Author's Latest Posts

CPF 2.0 Voltage Regulator And Analog Ports
By Luke Lang - 08 Nov, 2012 - Comments: 0

By Luke Lang CPF 2.0 was released more than a year and half ago, yet the majority of the designs are still done with CPF 1.1. This is one of those good news/bad news situations. The good news is that CPF 1.1 is perfectly adequate for majority of the LP designs. The bad news is that designers may not be aware of the new CPF 2.0 features that could be quite useful. This month, we will take a loo... » read more

LP Test
By Luke Lang - 11 Oct, 2012 - Comments: 0

By Luke Lang Last month, we discussed testing a portion of a chip at a time to reduce overall power dissipation during test. However, this does not address local power dissipation hotspots that can cause excessive IR drop. These hotspots can occur in regions where many nets are switching at the same time. Typically, a chip’s power grid is designed to meet IR drop specification in the func... » read more

LP Test Strategies
By Luke Lang - 13 Sep, 2012 - Comments: 0

By Luke Lang Power during test is one area that is often overlooked. In the worst (but easiest to diagnose) case, excessive test power can lead to a smoking chip on the tester. (You don’t need an engineering education to see the problem.) In a better (but more difficult to diagnose) case, excessive test power will cause reduced yield. Let’s look at what causes excessive test power and how ... » read more

Power Mode And State
By Luke Lang - 12 Jul, 2012 - Comments: 0

By Luke Lang Low-power designs that use power shutoff (PSO) and multiple-supply voltage (MSV) will have circuits that operate at various voltages, including no voltage. To describe the combination of allowable voltages in a design, CPF uses power mode, and UPF 1.0 uses power state. In CPF, each power mode represents one combination of the states of all power domains. In UPF 1.0, each power ... » read more

LP Macros 2
By Luke Lang - 14 Jun, 2012 - Comments: 0

By Luke Lang Last month, I compared the CPF macro model with LP attributes in the Liberty model. The CPF macro model was developed when Liberty had very little LP attributes to support LP designs. Even today, Liberty still lacks LP attributes to describe some of the common power intent in LP designs. One example is an LP IP block with internal power switches and shutoff domains. Because mos... » read more

LP Macros
By Luke Lang - 10 May, 2012 - Comments: 0

By Luke Lang Many designers have asked why CPF has the macro model commands while UPF/1801 does not. I will try to answer this question and explain the differences in both approaches. First, let’s briefly review CPF macro model. A CPF macro model describes the power interface of a macro cell, which could be a complex cell (pad cell), an IP block (memory), or a hardened block (ARM core). F... » read more

Shoot The Engineer
By Luke Lang - 08 Mar, 2012 - Comments: 0

By Luke Lang Many years ago as a junior engineer right out of college, my manager explain to me the concept of “shoot the engineer.” Engineers are trained to be perfectionists. We want to design the best mouse trap ever. However, the engineer that designs the first working mouse trap takes home the money. Given another day, another week, or another month, we can always improve upon our cur... » read more

Virtual LP
By Luke Lang - 09 Feb, 2012 - Comments: 0

By Luke Lang Several months ago, I introduced the concept of virtual domain in association with hierarchical CPF. It is a relatively simple concept with a concise definition. It is powerful and flexible in supporting large designs with complex power architecture and hierarchical power intent. However, to the UPF coders, virtual domain is sometimes a mystery. I hope this blog will clear up any ... » read more

Power Intent Formats: Reality Check
By Luke Lang - 12 Jan, 2012 - Comments: 2

By Luke Lang It is January once again. In addition to wishing everyone a Happy New Year, I would like to wish everyone a lower-power 2012. This month, I will continue with the CPF/UPF power format discussion and examine more complex power architectures. Also, the focus will be only on CPF 1.1 and UPF 1.0. These are what the current tools support. IEEE 1801 is up and coming, but there is n... » read more

Power Intent Formats
By Luke Lang - 01 Dec, 2011 - Comments: 0

The October blog about CPF, UPF 1.0, and IEEE 1801 power domain definitions resulted in some reader feedback and suggestions. Several points are worthy of further discussion and clarification. Let me start with the toughest questions. What is my motivation behind the blog? Am I trying to make CPF look better than UPF/IEEE 1801? My preferred choice of power intent should not be a surprise ... » read more

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