Barry Pangrle

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Barry Pangrle is a power architect. He is based in Silicon Valley.

Author's Latest Posts

Interconnect Power II
By Barry Pangrle - 08 Sep, 2011 - Comments: 0

Barry Pangrle After submitting last month’s blog, I read a very interesting article by Deepak Sekar analyzing Intel’s 22 nm FinFET technology versus a hypothetical planar 22nm CMOS technology. Beyond the advantages of being able to use a 140 mV reduction in the supply voltage for the trigate technology, Deepak did a breakdown analysis for the predicted power across a representative micropr... » read more

Interconnect Power
By Barry Pangrle - 11 Aug, 2011 - Comments: 0

By Barry Pangrle Applied Materials announced its latest version of nano-porous low-k dielectric technology called Black Diamond 3 last month at Semicon West. What really caught my ear though was the marketing claim that 1/3 of total chip power consumption (really energy) is in the interconnect. I thought about this a bit, and certainly for some designs this seemed to easily be quite po... » read more

Building A Better CMOS FET
By Barry Pangrle - 21 Jul, 2011 - Comments: 0

By Barry Pangrle SEMICON West was held last week in San Francisco and I had the opportunity to attend the Emerging Architectures session. Serge Biesemans, vice president of process technology at Imec, gave a nice overview presentation on FinFETs. From a power and performance standpoint, we’ve seen some early pre-production information released from Intel that I briefly discussed here. Serge�... » read more

The Tough Metric: Energy-Efficiency
By Barry Pangrle - 16 Jun, 2011 - Comments: 0

By Barry Pangrle Jem Davies, fellow and vice president of technology at ARM, gave a keynote address on Computing Power and Energy-Efficiency Tuesday morning at the AMD Fusion Developer Summit in Bellevue, Washington. His scheduled appearance at the summit led to much speculation and rumor a while back, especially within the context of the ARM versus x86 battle for market share in the tablet ar... » read more

Intel’s New Machine
By Barry Pangrle - 12 May, 2011 - Comments: 0

By Barry Pangrle Power is one of those product characteristics that touches on every phase of the design and verification process all the way from the system architecture down to the fabrication process used for the actual IC implementation. In this month’s blog we take a look at process technology and in this case, it appears to be the case that the technology rich are getting richer. On... » read more

Emulation Power
By Barry Pangrle - 14 Apr, 2011 - Comments: 0

By Barry Pangrle Power budgets and the characteristics of the underlying process technologies have limited the clock speeds of the processors often found in large compute farms for simulation over the past six years, but the designs under test have followed Moore’s Law and have kept growing larger at an exponential rate. Processor designers have added more cores per chip to increase the p... » read more

Core Power
By Barry Pangrle - 17 Mar, 2011 - Comments: 0

By Barry Pangrle What type of core should I choose if I want to be really power-efficient? That’s an interesting question. The answer that a lot of people will hate to hear is that it depends. Probably the first question that needs to be answered is, what does power-efficient mean to you and how power-efficient do you really want to be? Most people can’t wait forever for a result to be ... » read more

Power vs. Accuracy
By Barry Pangrle - 10 Feb, 2011 - Comments: 0

By Barry Pangrle So, how much energy are you willing to expend to be accurate? The question is one that chip designers face more often than they probably realize. The first question really is, ‘How accurate do you need to be?’ Whether it is test coverage, verification coverage, signal-to-noise ratio, or error-correcting codes, the list is seemingly endless. Variability in the environmen... » read more

Power Next
By Barry Pangrle - 13 Jan, 2011 - Comments: 0

Development teams are faced with many tradeoffs when defining a new product: How much should it cost? What functionality or features need to be included? And what level of performance is required? As an example, in order to reduce costs it’s possible to trade away performance by implementing functionality in software instead of in application-specific hardware. For an SoC that already inc... » read more

Power On
By Barry Pangrle - 02 Dec, 2010 - Comments: 0

By Barry Pangrle Process development is more challenging at each successive technology node but the march forward, for the time being, continues unabated. Voltage scaling stopped around the 100nm node at roughly 1.0v as threshold voltages stopped shrinking in an attempt to keep leakage in check. It’s been the progression to the newer and smaller technology nodes that has really pushed power ... » read more

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