Author's Latest Posts


AI Agents Need Goals


Experts At The Table: Definitions and goals matter when it comes to using AI effectively, and it has to be tightly reined in to be effective. Semiconductor Engineering sat down with a panel of experts to discuss these issues and others, including Johannes Stahl, senior director of product line management for the Systems Design Group at Synopsys; Michael Young, director of product marketing for ... » read more

3D-IC Ecosystem Starts To Take Form


The adoption of chiplets is inevitable, but exactly when a mass migration toward this design approach will begin is yet to be determined. Nevertheless, some of the biggest technological and business-related barriers are being addressed. And while a chiplet-based design remains beyond the economic reach of many companies today, that is starting to change. Early signs of an emerging ecosystem ... » read more

Times Are Changing For EDA


The EDA industry is about 50 years old, and I see the people responsible for its first generation setting their LinkedIn employment status to 'retired, at home' almost daily. I, for one, have a foot in that camp, but reporting/writing is different than having a full-time job because I can control the time commitment. We have seen many serial entrepreneurs who have created several successful com... » read more

Digital Twins For Design And Verification Workflows


Experts At The Table: AI is starting to impact several parts of the EDA design and verification flows, but so far these improvements are isolated to a single tool or small flows provided by a single company. What is required is a digital twin of the development process itself, on which AI can operate. Semiconductor Engineering sat down with a panel of experts, including Johannes Stahl, senior d... » read more

3D-IC For The Masses


The concepts of 3D-IC and chiplets have the whole industry excited. It potentially marks the next stage in the evolution of the IP industry, but so far, technical difficulties and cost have curtailed its usage to just a handful of companies. Even within those, they do not appear to be seeing benefits from heterogeneous integration or reuse. Attempts to make this happen are not new. "A decade... » read more

The Price Of Fear


In my last blog, I talked about how pain is important when making predictions in the semiconductor industry. Pain is related to time to market and risk, and the flip side of risk is fear. Fear is one of the main drivers for a large number of EDA tools, such as those related to verification. The fear is taping out a chip, then waiting for what seems like an eternity to get the first chips bac... » read more

Improving Verification Methodologies


Methodology improvements and automation are becoming pivotal for keeping pace with the growing complexity and breadth of the tasks assigned to verification teams, helping to compensate for lagging speed improvements in the tools. The problem with the tools is that many of them still run on single processor cores. Functional simulation, for example, cannot make use of an unlimited number of c... » read more

What Exactly Is Multi-Physics?


Multi-physics is the new buzzword in semiconductor design and analysis, but the fuzziness of the term is a reflection of just how many new and existing problems need to be addressed simultaneously in the design flow with advanced nodes and packaging. This disaggregation of planar SoCs and the inclusion of more processing elements, memories, interconnects, and passives inside a package has cr... » read more

What’s Missing From Predictions


At this point everyone has made their predictions for the year, but there is one thing many people get wrong. Predictions are not about innovation. They are about pain and what is causing it. This industry is risk-averse, and everyone wants to continue doing what they are doing. But there comes a point when it's so painful to continue that something has to change. Having something that is... » read more

Chiplets Still A Challenge With UCIe 2.0


Plug-and-play chiplets are a popular goal, but does UCIe 2.0 move us any closer to that becoming a reality? The problem is that the current drivers of the standard are not after interoperability in the way that plug-and-play requires. Released in August 2024, UCIe 2.0 touts higher bandwidth density and improved power efficiency, as well as new features supporting 3D packaging, a manageable s... » read more

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