David Abercrombie

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David Abercrombie is the marketing director for Calibre multi-patterning, machine-learning, and licensing applications at Siemens EDA, a part of Siemens Digital Industries Software. Abercrombie drives the roadmap for developing new and enhanced EDA tools to solve the growing challenges in advanced physical verification and design for manufacturing (DFM). Prior to joining Siemens, Abercrombie managed yield enhancement programs in semiconductor manufacturing at multiple companies. He is extensively published in papers and patents on semiconductor processing, yield enhancement, and physical verification. Abercrombie received his BSEE from Clemson University, and his MSEE from North Carolina State University.

Author's Latest Posts

Case Studies in P&R Double-Patterning Debug
By David Abercrombie - 20 Aug, 2015 - Comments: 0

In my last article, we looked at some case studies of the unique types of issues related to double patterning (DP) that place and route (P&R) and chip finishing engineers have to deal with. I’ve got some more interesting case studies to show you this time. In modern P&R designs, the metal routes on a particular layer are unidirectional (or at least primarily unidirectional). Long p... » read more

Case Studies In Double-Patterning Debug
By David Abercrombie - 18 Jun, 2015 - Comments: 0

Double patterning (DP) impacts just about every part of the design and manufacturing flows. However, the kinds of issues you encounter, the way they manifest themselves, and the ideal way to address them may be very different in different parts of these flows. I feel like I have spent a lot of time the last six months or so working with place and route (P&R) and chip finishing engineers on DP i... » read more

Are Three Eyes Better Than Two?
By David Abercrombie - 16 Apr, 2015 - Comments: 0

It is clear that having two eyes is better than having just one. Not only is depth perception much better, but we get to enjoy 3D movies because of it. There is also some sense of security in knowing that if something terrible happened to one eye, you always have a backup. Have you ever wondered if these sorts of advantages are extendable? You’ve probably heard the phrase about someone ha... » read more

Balancing On The Color Density Tightrope
By David Abercrombie - 19 Feb, 2015 - Comments: 0

Balancing on wobbly tightropes is something that chip designers get pretty good at. For instance, there is a fine balance between optimizing performance and minimizing leakage in a design layout. Dealing with the new requirements that multi-patterning (MP) introduces into a design flow creates many new tightropes to walk. I tiptoed out on one of the rarely talked about ones in my last article�... » read more

Multiple Patterns, Multiple Trade-Offs
By David Abercrombie - 11 Dec, 2014 - Comments: 0

As the saying goes, “There is no such thing as a free lunch.” That is a reality that chip designers have had to live by from the beginning. From the advent of the first design rule, it was clear that you couldn’t just do anything you wanted. In the end, everything comes down to trade-offs. Whether it’s area, speed, leakage, noise sensitivity, or drive current, doing something to impr... » read more

Is Multi-Patterning Good for You?
By David Abercrombie - 16 Oct, 2014 - Comments: 0

I think we can all remember growing up and our parents making us take nasty-tasting medicines, or eat foods we didn’t like, or endure painful things like shots, all under the banner of “It is good for you!” We didn’t like it then, and we still don’t like it as adults. We would all prefer a way to lose weight while eating anything we want, or building strong muscles and aerobic health ... » read more

Self-Aligned Double Patterning—Part Deux
By David Abercrombie - 14 Aug, 2014 - Comments: 0

In my last article, I introduced you to the basic Self-Aligned Double-Patterning (SADP) process that is one of the potential candidate techniques for processing metal layers at 10nm and below, but let’s have a quick recap. SADP uses a deposition and etch step process to create spacers surrounding a patterned shape (Figure 1). As you can see, there are two masking steps—the first mask is cal... » read more

Self-Aligned Double Patterning, Part One
By David Abercrombie - 15 May, 2014 - Comments: 0

I’m sure most of you have seen a Rorschach test ink blot (Figure 1). Psychiatrists ask the subjects to tell them what they “see” in the ink blot. The answers are used to characterize the respondent’s personality and emotional functioning. I am never sure if I would feel more uncertain being the psychiatrist asking the question, or the subject trying to decide what to say, given there ar... » read more

When Order Matters
By David Abercrombie - 20 Mar, 2014 - Comments: 0

Do you brush your teeth before dinner? Put on your shoes before going to bed? Iron your clothes before you wash them? Okay, forget that last one. No one irons clothes anymore…do they? Anyway, my point is, if you want to achieve the best results from a process, order can be really important. And so it is with double patterning (DP) error debugging. As I’ve discussed, there are many types ... » read more

The Trouble With Triples—Part 2
By David Abercrombie - 23 Jan, 2014 - Comments: 1

In my last blog, we started to look at some of the challenges of triple patterning (TP) compared to double patterning (DP). In particular, we looked at the algorithmic complexity of determining if a valid coloring solution exists, and if so, producing a three-mask decomposition. This time, let’s look into the challenges of what to do if a layout is not legally decomposable into three colors. ... » read more

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