Gregory Haley

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Gregory Haley is a technology editor at Semiconductor Engineering.

Author's Latest Posts

Rethinking Chip Reliability For Harsh Conditions
By Gregory Haley - 10 Jun, 2025 - Comments: 0

As semiconductors push into environments once considered untenable, reliability expectations are being redefined. From the vacuum of space and the inside of jet engines to deep industrial automation and electrified drivetrains, chips now must endure extreme temperature swings, corrosive atmospheres, mechanical vibration, radiation, and unpredictable power cycles, all while delivering increasing... » read more

On The Ground At ECTC 2025
By Gregory Haley - 02 Jun, 2025 - Comments: 0

Senior Executive Editor Laura Peters examines the the hot topics at last week's IEEE's Electronic Components and Technology Conference, including the impact of hardware-software integration on power consumption, co-packaged optics, hybrid bonding, and fan-out panel-level packaging. https://youtu.be/yBDKqrPQBl4   » read more

Inside Chips Podcast: May 27
By Gregory Haley - 27 May, 2025 - Comments: 0

Jo De Boeck, chief strategy officer and EVP at imec, talks with Semiconductor Engineering Technology Editor Gregory Haley about system technology co-optimization and the intersection of technology and AI. https://www.youtube.com/watch?v=XUgQPBIaDHQ » read more

Mask Complexity, Cost, And Change
By Gregory Haley - 22 May, 2025 - Comments: 0

Experts at the Table: As leading-edge lithography nodes push further into EUV and beyond, mask-making has become one of the most critical and costly aspects of semiconductor manufacturing. At the same time, non-EUV applications are stretching the lifetime of older tools and processes, challenging the industry to find new solutions for both ends of the spectrum. Semiconductor Engineering sat dow... » read more

E-Beam Inspection Proves Essential For Advanced Nodes
By Gregory Haley - 08 May, 2025 - Comments: 0

Electron-beam inspection is proving to be indispensable for finding critical defects at sub-5nm dimensions. The challenge now is how to speed up the process to make it economically palatable to fabs. E-beam inspection's notorious sensitivity-throughput tradeoff has made comprehensive defect coverage with e-beam at these advanced nodes especially problematic. For Intel’s 18A logic node (~1.... » read more

Need For Speed Drives Targeted Testing
By Gregory Haley - 23 Apr, 2025 - Comments: 0

As packaging complexity increases and nodes shrink, defect detection becomes significantly more difficult. Engineers must contend with subtle variations introduced during fabrication and assembly without sacrificing throughput. New material stacks degrade signal-to-noise ratios, which makes metrology more difficult. At the same time, inspection systems face a more nuanced challenge — how t... » read more

Packaging With Fewer People And Better Results
By Gregory Haley - 17 Apr, 2025 - Comments: 1

Advanced packaging has evolved far beyond the simple stacking of dies and connecting of interposers. Once a passive conduit between silicon and the outside world, it has become an active component of overall device performance. In today’s multi-die assemblies, the assembly and packaging lines are expected to maintain signal integrity at multi-gigahertz frequencies, manage heat in verticall... » read more

Nearly Invisible: Defect Detection Below 5nm
By Gregory Haley - 08 Apr, 2025 - Comments: 0

Detecting sub-5nm defects creates huge challenges for chipmakers, challenges that have a direct impact on yield, reliability, and profitability. In addition to being smaller and harder to detect, defects are often hidden beneath intricate device structures and packaging schemes. Moreover, traditional optical and electrical probing methods, trusted for decades, are proving inadequate against ... » read more

Big Changes Ahead For Interposers And Substrates
By Gregory Haley - 24 Mar, 2025 - Comments: 1

Interposers and substrates are undergoing a profound transformation from intermediaries to engineered platforms responsible for power distribution, thermal management, high-density interconnects, and signal integrity in the most advanced computing systems. This shift is being driven by AI, high-performance computing (HPC), and next-generation communications, where the need for heterogeneous ... » read more

Failure To Launch
By Gregory Haley - 11 Mar, 2025 - Comments: 1

Failure analysis (FA) is an essential step for achieving sufficient yield in semiconductor manufacturing, but it’s struggling to keep pace with smaller dimensions, advanced packaging, and new power delivery architectures. All of these developments make defects harder to find and more expensive to fix, which impacts the reliability of chips and systems. Traditional failure analysis techniqu... » read more

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