Author's Latest Posts


E-beam’s Role Grows For Detecting IC Defects


The perpetual march toward smaller features, coupled with growing demand for better reliability over longer chip lifetimes, has elevated inspection from a relatively obscure but necessary technology into one of the most critical tools in fab and packaging houses. For years, inspection had been framed as a battle between e-beam and optical microscopy. Increasingly, though, other types of insp... » read more

Week In Review, Manufacturing, Test


Samsung announced initial production of its 3nm process node, which uses a gate-all-around (nanosheet) transistor structure that the company calls Multi-Bridge-Channel FET (MBCFET). The first-generation 3nm process can reduce power consumption by up to 45% compared with a 5nm process, as well as improve performance by 23% and reduce area by 16%, according to the company. The second-generation 3... » read more

Week In Review: Manufacturing, Test


Notes from the fabs Intel warned the “scope and pace" of the Ohio fab buildout could be impacted due to U.S. Congress’ inaction on funding the $52 billion CHIPS Act. The facility was announced in January with an initial phase investment of more than $20 billion with a larger expansion up to $100 billion over the next decade. The initial phase is not expected to be impacted, other than a de... » read more

DRAM Thermal Issues Reach Crisis Point


Within the DRAM world, thermal issues are at a crisis point. At 14nm and below, and in the most advanced packaging schemes, an entirely new metric may be needed to address the multiplier effect of how thermal density increasingly turns minor issues into major problems. A few overheated transistors may not greatly affect reliability, but the heat generated from a few billion transistors does.... » read more

Newer posts →