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Analysis Of Pattern Distortion By Panel Deformation And Addressing It By Using Extremely Large Exposure Field Fine-Resolution Lithography


The growing demand for heterogeneous integration is driven by the 5G market. This includes smartphones, data centers, servers, high-performance computing (HPC), artificial intelligence (AI) and internet of things (IoT) applications. Next-generation packaging technologies require tighter overlay to accommodate larger package sizes with fine-pitch chip interconnects on large-format flexible panel... » read more

Methods To Overcome Limited Labeled Data Sets In Machine Learning-Based Optical Critical Dimension Metrology


With the aggressive scaling of semiconductor devices, the increasing complexity of device structure coupled with tighter metrology error budget has driven up Optical Critical Dimension (OCD) time to solution to a critical point. Machine Learning (ML), thanks to its extremely fast turnaround, has been successfully applied in OCD metrology as an alternative solution to the conventional physical... » read more

The Human Hand: Curating Good Data And Creating An Effective Deep-Learning R2R Strategy For High-Volume Manufacturing


Currently, the semiconductor manufacturing industry uses artificial intelligence and machine learning to take data and autonomously learn from that data. With the additional data, AI and ML can be used to quickly discover patterns and determine correlations in various applications, most notably those applications involving metrology and inspection, whether in the front-end of the manufacturing ... » read more

Weaving Digital Threads Into A Global Fabric Of Enterprise Knowledge


How smart manufacturing software provides visibility and control of all phases of the semiconductor manufacturing process. Run-to-run (R2R) automated process control gathers critical data from each production run and automatically adjusts process parameters for the next run based on sophisticated models of process performance. Click here to read more. » read more

Large-Field, Fine-Resolution Lithography Enables Next-Generation Panel-Level Packaging


The lithography challenge for large heterogeneous integration is the limited size of the exposure field (typically 60mm x 60mm or less) for most currently available lithography systems. Fine resolution and a large field size provide the user with the opportunity to increase the package size beyond 150mm x 150mm and maintain high throughput. This new capability has the potential to pave the ... » read more

Extremely Large Exposure Field With Fine Resolution Lithography Technology To Enable Next Generation Panel Level Advanced Packaging


The growing demand for heterogeneous integration is driven by the 5G market that includes smartphones, data centers, servers, HPC, AI and IoT applications. Next-generation packaging technologies require tighter overlay to accommodate a larger package size with finer pitch chip interconnects on large format flexible panels. Heterogeneous integration enables next-generation device performance ... » read more

Imaging Of Overlay And Alignment Markers Under Opaque Layers Using Picosecond Laser Acoustic Measurements


Optically opaque materials present a series of challenges for alignment and overlay in the semi-damascene process flow or after the processing of the magnetic tunnel junction (MTJ) of a Magnetic Random-Access Memory (MRAM). The overlay and alignment of a lithographically defined pattern on top of the pattern and the underlying layer is fundamental to device operation in all multi-layer patterne... » read more

Advanced Outlier Die Control Technology In Fan-Out Panel Level Packaging Using Feedforward Lithography


The growing demand for heterogeneous integration is driven by the 5G market that includes smartphones, data centers, servers, HPC, AI and IoT applications. Next-generation packaging technologies require tighter overlay to accommodate a larger package size with finer pitch chip interconnects on large format flexible panels. Fan-out panel level packaging (FOPLP) is one of the technologies that... » read more

Fab Fingerprint For Proactive Yield Management


The following paper presents a case study describing how to improve yield and fab productivity by implementing a frequent pattern database that utilizes artificial intelligence-based spatial pattern recognition (SPR) and wafer process history. This is important because associating spatial yield issues with process and tools is often performed as a reactive analysis, resulting in increased wafer... » read more

Acoustic Metrology for Fine Pitch Microbumps in 3D IC


The continuing shift to 3D integration requires formation of electrical interconnects between multiple vertically stacked Si devices to enable high speed, high bandwidth connections. Microbumps and through silicon vias (TSVs) enable the high-density interconnects for die-to-die and die-to-wafer stacking for different applications. In this paper, we present acoustic metrology techniques for the ... » read more

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