224Gbps PHY For The Next Generation Of High Performance Computing

By Priyank Shukla - 18 Jul, 2024 - Comments: 0

Large language models (LLMs) are experiencing an explosive growth in parameter count. Training these ever-larger models requires multiple accelerators to work together, and the bandwidth between these accelerators directly limits the size of trainable LLMs in High Performance Computing (HPC) environments. The correlation between the LLM size and data rates of interconnect technology herald a... » read more

Integrated Ethernet PCS And PHY IP For 400G/800G Hyperscale Data Centers

By Priyank Shukla - 09 Sep, 2021 - Comments: 0

Ethernet has become the primary network protocol of choice for the required server-to-server communication in hyperscale data centers, as it allows hyperscalers to disaggregate network switches and install their software operating systems independently. Ethernet enables cost-effective, dense, open switches and networking technologies which reduce cost/power per bit with transistor scaling. Ethe... » read more

112G SerDes Modeling And Integration Considerations

By Priyank Shukla - 14 Jan, 2021 - Comments: 0

The ever-increasing demand for compute power and data processing in accelerators, intelligence processing units (IPUs), GPUs, as well as training and inference SoCs is driving the adoption of 112G SerDes PHY IP solutions. Ensuring a reliable Ethernet link and efficient integration are the most essential requirements that designers need to meet. IBIS-AMI modeling can help predict SerDes link per... » read more