Author's Latest Posts


Improving Semiconductor Yield Using Large Area Analysis


Design rule checking (DRC) is a technique used during chip design to ensure that a device can successfully be manufactured at high yield. Design rules are established based on the limits and variability of equipment and process technologies in use. DRC checking ensures that a design meets manufacturing requirements and will not result in a chip failure or DRC “violation.” Common DRC rules i... » read more

How FinFET Device Performance Is Affected By Epitaxial Process Variations


By Shih-Hao (Jacky) Huang and Yu De Chen As the need to scale transistors to ever-smaller sizes continues to press on technology designers, the impact of parasitic resistance and capacitance can approach or even outpace other aspects of transistor performance, such as fringing capacitance or source drain resistance. The total resistance in a device is comprised of two components: internal re... » read more

Integrating Process Models With TCAD Simulation…


Novel semiconductor technologies are creating complex process flows, which are needed to support the manufacturing of advanced 3D semiconductor structures. It can be helpful to model process flows, and their effect on a novel device, prior to physical fabrication. Process modeling is a technique that can predict the 3D structure of a device using an understanding of unit process steps. Durin... » read more