Author's Latest Posts

Enabling Efficient Multi-Die Design Implementation and IP Integration
By Synopsys - 28 Aug, 2024 - Comments: 0

Many industry trends are driving chip developers to consider multi-die designs using advanced 2.5D and 3D technologies. Such designs enable incorporating heterogeneous and homogeneous dies in a single package, increasing density while reducing signal propagation times. However, multi-die designs introduce new challenges that must be addressed by all relevant electronic design automation (EDA) a... » read more

Requirements and Best Practices for Trustworthy Automotive Semiconductors
By Synopsys - 31 Jul, 2024 - Comments: 0

The complexity of electronic systems supporting Advanced Driver Assistance Systems (ADAS), Highly Automated Driving (HAD), and in-vehicle infotainment is growing exponentially. This, together with the move from multiple domain-specific Electronic Control Units (ECUs) to a zonal architecture will require high-performance computing. Furthermore, new use cases for Battery Electric Vehicles (BEV) i... » read more

Unifying Storage Diversity: Leveraging PCIe IP for Multi-Device, Multi Form Factor Designs
By Synopsys - 24 Jul, 2024 - Comments: 0

In the fast-paced world of data storage, designers are racing to keep up with ever-evolving interface standards and form factors. This whitepaper explores the impact of these industry shifts, focusing on the integration of PCIe interfaces within the context of varying storage device form factors like the Enterprise and Datacenter Standard Form Factor (EDSFF). PCIe designs need to be flexible in... » read more

Effective Monitoring, Test, and Repair of Multi-Die Designs
By Synopsys - 09 Jul, 2024 - Comments: 0

Despite clear advantages, there are numerous new challenges that need to be addressed for successful multi-die realization. The multi-die test challenges include: Bare chiplet level (pre-bond) Probe, dedicated/functional pads for test Test, diagnosis, and repair Interconnects (mid/post-bond) Die-to-die test access Lane test, diagnosis, and repair Multi-die ... » read more

Holistic Verification and Validation of Automotive IP for Functional Safety SoCs
By Synopsys - 03 Jul, 2024 - Comments: 0

Automotive functional safety systems have strict requirements to help avoid damages to life and property in case of a failure. As technology becomes more complex, there are increasing safety-related risks from systematic failures and random hardware failures that must be considered during product development. Standards like ISO 26262 provide guidance to mitigate such safety-related risks, by de... » read more

Accelerate Test Regressions with Synopsys VIP Using Dynamic Test Loading in VCS
By Synopsys - 27 Jun, 2024 - Comments: 0

Functional verification ensures that a design meets its specification requirements. The initial 80% of the verification process significantly impacts the time needed to complete the final 20%, which involves extensive test scenarios and regression testing, often consuming substantial engineering resources. Typically, the desired scenario emerges late in the test case, often in the last minutes ... » read more

Testing PCI Express 5.0 PHY Transmitter Performance Without Analysis Software
By Synopsys - 12 Jun, 2024 - Comments: 0

PCI Express (PCIe) 5.0 silicon characterization across process, voltage, and temperature variations, is necessary for accelerating SoC designs. To measure key qualifying parameters, designers and test engineers must have a good understanding of the PCIe 5.0 base electrical specification and know the physical layer’s design architecture and features for accurate characterization of 32GT/s PHY ... » read more

2024 Open Source Security And Risk Analysis Report
By Synopsys - 05 Jun, 2024 - Comments: 0

This report offers recommendations to help creators and consumers of open source software manage it responsibly, especially in the context of securing the software supply chain. Whether a consumer or provider of software, you are part of the software supply chain, and need to safeguard the applications you use from upstream as well as downstream risk. In the following pages, we e... » read more

A Unified Solution for End-to-End Low Power Verification
By Synopsys - 29 May, 2024 - Comments: 0

Low power designs are becoming increasingly prevalent in modern electronic systems, driven by the need for energy-efficient devices. Ensuring the correctness of these designs is paramount, as even minor errors can lead to catastrophic consequences. To achieve verification closure for low power designs, a combination of static verification, dynamic simulation-based verification, formal verificat... » read more

2024 Open Source Risk In M&A By The Numbers
By Synopsys - 08 May, 2024 - Comments: 0

Here’s what we know: Most of today’s codebases contain open source components. Vulnerabilities and licensing issues in codebases are as pervasive as open source itself. Unpatched software vulnerabilities are one of the biggest cyberthreats organizations face. Failure to comply with open source licenses can put businesses at significant risk of litigation and threat to IP. T... » read more

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