Author's Latest Posts

How Low Can You Go? Pushing The Limits Of Transistors
By Synopsys - 09 Nov, 2022 - Comments: 0

Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when the device is not active (leakage power). This highly competitive industry provides significant rewar... » read more

Modeling Silicon Photonics Process Parameter Variations In Synopsys OptoCompiler-OptSim
By Synopsys - 08 Nov, 2022 - Comments: 0

Silicon photonics (SiPh) refers to the enablement of photonic integrated circuits (PIC) over silicon wafer. SiPh enables compatibility with existing CMOS manufacturing infrastructure for large-scale integration and brings the associated benefits to the photonics, namely, lower footprint, lower thermal effects, and co-packaging of electronics and photonics on the same chip. One of the side-effec... » read more

Expansion Of The IoT Brings New Security Challenges
By Synopsys - 02 Nov, 2022 - Comments: 0

The evolution of 5G technologies continues to drive advancement in Internet of Things (IoT) devices and their applications. By 2025, experts predict there will be nearly 4 billion IoT mobile connections in the world, and more than 64 billion IoT devices by 2026. In addition to enabling superior performance and efficiency, 5G expands the attack surface of applications and devices that run on ... » read more

Faster And Smarter LVS For The SoC Era
By Synopsys - 26 Oct, 2022 - Comments: 0

Development of a modern system-on-chip (SoC) device is a long and incredibly complex process. Design teams rely on a huge range of tools, technologies, and methodologies to get the job done. Given the ongoing advances in silicon technology and design architecture, the tools are in a constant state of evolution. Logic-versus-schematic (LVS) checking is one of those tools. This is one of the earl... » read more

Silicon Lifecycle Management Platform
By Synopsys - 12 Oct, 2022 - Comments: 0

Silicon Lifecycle Management (SLM) is an emerging paradigm within the industry that is making product development and deployment more deterministic. In-silicon observability and insight are key when it comes to SLM and as an industry we can no longer afford to be blind to what is happening inside the chip. SLM is starting to close the loop between design and in-field. Click here to read more. » read more

First Line of Defense: Developer Security Tools In The IDE
By Synopsys - 05 Oct, 2022 - Comments: 0

We all want to produce better and more secure software, and we want to do it faster than ever before. For developers, this means taking on more responsibility for security without sacrificing velocity, as well as learning new tools and processes that may have been prescribed by teams that are disconnected from the development process. By bringing security detection and remediation into the i... » read more

Faster & Smarter LVS For The SoC Era
By Synopsys - 21 Sep, 2022 - Comments: 0

Development of a modern system-on-chip (SoC) device is a long and incredibly complex process. Design teams rely on a huge range of tools, technologies, and methodologies to get the job done. Given the ongoing advances in silicon technology and design architecture, the tools are in a constant state of evolution. Logic-versus-schematic (LVS) checking is one of those tools. This is one of the earl... » read more

Better, Faster, And More Efficient Verification With The Power Of AI
By Synopsys - 07 Sep, 2022 - Comments: 0

Verification is often the most challenging part of the chip development process. Verification engineers have to balance quality of results (QOR) with time to results (TTR) and cost of results (COR). AI and ML technologies can play a significant part in increasing QOR, speeding up TTR, and reducing COR. This white paper outlines some of the major challenges for verification, describes how AI pro... » read more

Choosing The Right Photonic Device Design Software
By Synopsys - 10 Aug, 2022 - Comments: 0

There are many factors to consider before deciding which software to use for photonic device design. To narrow the field, it can be helpful to ask these key questions as you investigate and compare software functionality. • Does the software provide enough flexibility to model and analyze products that offer the best solution to likely and possible design goals? • Is the simulation ca... » read more

Synopsys And Cerebras Systems
By Synopsys - 09 Aug, 2022 - Comments: 0

The Cerebras Systems Wafer-Scale Engine 2 (WSE-2) is by far the largest silicon product available, with a total silicon area of 46,225mm². It utilizes the maximum square of silicon that can be made out of a 300mm diameter wafer. The square of silicon contains 84 die that are 550mm² each. These die were stitched together using proprietary layers of interconnect, making a continuous compute fab... » read more

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