Author's Latest Posts


Hardware Fuzzer Utilizing LLMs


A new technical paper titled "Beyond Random Inputs: A Novel ML-Based Hardware Fuzzing" was published by researchers at TU Darmstadt and Texas A&M University. Abstract "Modern computing systems heavily rely on hardware as the root of trust. However, their increasing complexity has given rise to security-critical vulnerabilities that cross-layer at-tacks can exploit. Traditional hardware ... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS


A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Chiplet Hardware Security Module To Mitigate Security Vulnerabilities In SiP Systems (Univ. of Florida)


A new technical paper titled "Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration" was published by researchers at University of Florida (Gainesville). Abstract: "The semiconductor industry has adopted heterogeneous integration (HI), incorporating modular intellectual property (IP) blocks (chiplets) into a unified syst... » read more

Comparison Of The Meta Modeling Approach With HGLs


A new technical paper titled "The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages" was published by researchers at Infineon Technologies and TU Munich. Abstract "The rapid evolution of Integrated Circuit (IC) development necessitates innovative methodologies such as code generation to manage complexity and increase productivity. Using the right methodology for g... » read more

Using Palladium To Address Contact Issues Of Buried Oxide Thin Film Transistors


A new technical paper titled "Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway" was published by researchers at Tokyo Institute of Technology and National Institute for Materials Science (NIMS). Abstract "Amorphous oxide semiconductors (AOSs) with low off-currents and processing temperatures... » read more

3-Channel Package-Scale Galvanic Isolation Interface for SiC and GaN Power Switching Converters


A new technical paper titled "A Three-Channel Package-Scale Galvanic Isolation Interface for Wide Bandgap Gate Drivers" was published by STMicroelectronics and DIEEI, Università di Catania. Abstract "This article presents the design of a three-channel package-scale galvanic isolation interface for SiC and GaN power switching converters. The isolation interface consists of two side-by-sid... » read more

2D van der Waals Magnets Above Room Temperature (MIT)


A new technical paper titled "Field-free deterministic switching of all–van der Waals spin-orbit torque system above room temperature" was published by researchers at MIT, with funding by the NSF and U.S. Department of Energy. Abstract "Two-dimensional van der Waals (vdW) magnetic materials hold promise for the development of high-density, energy-efficient spintronic devices for memory an... » read more

Low-Overhead Fault-Tolerant Quantum Memory (IBM)


A new technical paper titled "High-threshold and low-overhead fault-tolerant quantum memory" was published by researchers at IBM Quantum. Abstract "The accumulation of physical errors prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such t... » read more

Scalable Verification of Memory Consistency (Purdue University)


A new technical paper titled "QED: Scalable Verification of Hardware Memory Consistency" was published by researchers at Purdue University. Abstract "Memory consistency model (MCM) issues in out-of-order-issue microprocessor-based shared-memory systems are notoriously non-intuitive and a source of hardware design bugs. Prior hardware verification work is limited to in-order-issue processors... » read more

Rowhammer Exploitation On AMD Platforms, DDR4 DDR5 (ETH Zurich)


A new technical paper titled "ZenHammer: Rowhammer Attacks on AMD Zen-based Platforms" was published by researchers at ETH Zurich. The work will be presented at USENIX Security Symposium in August 2024. Abstract: "AMD has gained a significant market share in recent years with the introduction of the Zen microarchitecture. While there are many recent Rowhammer attacks launched from Intel CPU... » read more

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