February 2012 - Page 4 of 4 - Semiconductor Engineering

A Brief History Of Power Formats

By Barry Pangrle - 09 Feb, 2012 - Comments: 0

Barry Pangrle A lot has happened in the industry in the way of power format standards over the past seven years. I’m going to attempt to hit on some of the highlights over that time period, especially with regards to the “Big 3” EDA vendors to hopefully put it all into better context for our readers. Early on, circa 2005, Mentor Graphics was working on a power format referred to as th... » read more

Converge And Consolidate

By Ed Sperling - 09 Feb, 2012 - Comments: 0

Electronics has always been about convergence, and convergence inevitably spawns new companies while forcing consolidation of others. What used to be in a device moved to a board, from a board there has been a perpetual push to put things in a chip. At one point, circa 2000, analog companies claimed that mixed signal chips were a thing of the past and that there would be separate analog chip... » read more

The Low Power-System Level Connection

By Ann Mutschler - 09 Feb, 2012 - Comments: 0

I don’t know about you but I am fired up (in a good way) with everything surrounding low power and design at the system level. We are at a point where the challenges are pretty well understood, we can see the way forward in many areas, but what needs to happen next is the evolution of technology that will compel users to adopt the new techniques, which may have yet to be created. Engineeri... » read more

Low-Power Verification

By Ed Sperling - 08 Feb, 2012 - Comments: 0

Low-Power Engineering talks about how to verify the power portion of semiconductor designs with Krishna Balachandran of Synopsys; Barry Pangrle of Mentor Graphics; Kalar Rajendiran of eSilicon; Will Ruby of Apache Design, and Lauro Rizzatti of Eve-USA. [youtube vid=covy6ku6RgA] » read more

Tennant’s Law, Part 2

By Chris Mack - 07 Feb, 2012 - Comments: 0

In the first part of this article, I talked about the empirically determined Tennant’s Law: the areal throughput (At) of a direct-write lithography system is proportional to the resolution (R) to the fifth power. In mathematical terms, At = kT R5 where kT is Tennant’s constant, and was equal to about 4.3 nm-3 s-1 in 1995 according to the data Don Tennant collected [1]. The power of ... » read more

Margin Call

By Ed Sperling - 03 Feb, 2012 - Comments: 0

Ever since Moore’s Law passed 65nm, the discussion has focused on power versus performance. Do you run a chip faster and hotter, or do you keep performance about the same from one chip to the next and improve battery life. At 28nm and beyond, there are other factors that begin to weigh into this discussion. One is reliability. Can a chip developed at the forefront of Moore’s Law be as re... » read more

Cymer’s EUV Power Source Roadmap Slips

By Mark LaPedus - 03 Feb, 2012 - Comments: 0

Amid record sales for the fourth quarter, Cymer Inc. disclosed that it has delayed the shipment of its 20 Watt extreme ultraviolet (EUV) power source upgrade unit by nearly a quarter. The company also remains under pressure to deliver a separate 100 Watt power source for EUV by mid-year. The main EUV tool vendor — ASML Holding NV — expects to ship its NXE:3300B, a full-blown, 13.5nm EU... » read more

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