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Ann Mutschler

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Ann Mutschler is senior executive editor at Semiconductor Engineering.

Author's Latest Posts

Designing Chips In The Context Of Rapidly Evolving AI
By Ann Mutschler - 04 May, 2026 - Comments: 0

Key Takeaways: Agentic edge AI drives long-lived, tool-mediated loops with variable demands for compute, tokens, and memory. Edge PPA is dominated by memory hierarchy and data movement, forcing tight feature triage and robust RAS. Rapid model churn (multimodal, MoE, new formats) requires programmable, headroom-rich compute, interconnect, and runtime. Experts At The Table: Ch... » read more

Foundry Capacity Is Limiting Who Competes At Leading Edge Nodes
By Ann Mutschler - 30 Apr, 2026 - Comments: 0

Key Takeaways: Leading-edge node access is increasingly reserved for hyperscalers, squeezing smaller chip developers. Chiplets and advanced packaging offer a path forward, but raise cost, complexity, and risk — especially for smaller teams. Chip architecture is now driven as much by capacity, yield, and economics as by technical goals. The benefits of device scaling are sl... » read more

Can Edge AI Keep Up?
By Ann Mutschler - 23 Apr, 2026 - Comments: 0

Key Takeaways: Model development is outpacing silicon design cycles, so edge AI architectures must prioritize adaptability. The required cadence for model updates is highly application-dependent and is closely tied to product lifetime and operational risk. Adaptability can conflict with power, performance, and area targets, so effective heterogeneous architectures and robust softwa... » read more

Fast Isn’t Fast Enough: Redefining Metrics for Edge AI
By Ann Mutschler - 09 Apr, 2026 - Comments: 0

Key Takeaways: Edge AI performance is about low latency and power efficiency, not peak TOPS. Memory bandwidth and data movement now limit edge AI more than compute. Successful edge AI requires balanced hardware, software, and fast model updates. Experts At The Table: Today’s chip architect must contend with multiple factors when architecting AI processors for fast and effi... » read more

IC Security Threats Spike With Quantum, AI, And Automotive
By Ann Mutschler - 02 Apr, 2026 - Comments: 0

Key Takeaways: The top challenge for the chip architect is building post‑quantum cryptography securely into real hardware from the start, not just selecting approved algorithms. Security must be treated as a core silicon architecture decision early on, especially for long‑lived, automotive, and multi‑vendor systems. Automotive cybersecurity now requires a holistic approach span... » read more

The One Bit Problem That Can Break a System
By Ann Mutschler - 02 Apr, 2026 - Comments: 2

Key Takeaways: Bit flipping is no longer a rare reliability issue but a systemic risk driven by shrinking process nodes, higher clock speeds, lower voltages, and radiation exposure, leading to silent data corruption and potential system failure. The same mechanisms that cause accidental bit flips can be deliberately exploited through techniques such as clock, voltage, laser, and rowhamm... » read more

AI Won’t Kill Verification IP, But It Will Redefine It
By Ann Mutschler - 26 Mar, 2026 - Comments: 0

Key Takeaways AI will enhance, not replace, verification IP by automating test generation and debug. Verification IP’s core value will increasingly lie in trust, accountability, and system-level realism, especially as designs become more complex, multi-die, and security-sensitive. AI shifts verification bottlenecks from execution to specification quality, raising expectations for c... » read more

AI Design Reshapes Data Management
By Ann Mutschler - 16 Mar, 2026 - Comments: 0

Key takeaways: Integrating AI into chip workflows is pushing companies to overhaul their data management strategies, shifting from passive storage to active, structured, and machine-readable systems. As training and inference workloads grow, data movement, congestion, and energy efficiency become the dominant challenges, often surpassing raw compute capability. Proprietary and comple... » read more

CPO Is Extending The Limits Of What’s Possible In AI Data Centers
By Ann Mutschler - 12 Mar, 2026 - Comments: 0

Key Takeaways I/O architecture must be co-designed with compute from day one. Partitioning SoCs into heterogeneous chiplets (compute, EIC, PIC, lasers) directly affects power delivery, floor-planning, interconnect topology, and system scalability. Successful CPO designs require architects to think in multi-physics terms, balancing electrical signaling, thermal stability, optical beha... » read more

Auto Security Accelerates With Standardization And Certified Silicon
By Ann Mutschler - 05 Mar, 2026 - Comments: 0

Key Takeaways The automotive sector is actively developing and delivering secure parts and features ranging from secure boot to encrypted data and in-network protections. The cost of a breach can involve everything from ransomware to liability and/or damage to a brand. New standards are being introduced to ensure security, and technology developers are integrating cybersecurity requi... » read more

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