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3D Connection Artifacts In PDN Measurements

Authors: Ethan Koether, Amazon; Kristoffer Skytte, John Phillips, Shirin Farrahi, Cadence; Joseph Hartman, Oracle; Sammy Hindi, Ampere Computing Inc.; Mario Rotigni, STMicroelectronics; Gustavo Blando, Istvan Novak, Samtec From a simulation stand-point, we have covered several important topics that users must consider in detail to get accurate low frequency simulation results. We investigate... » read more

Sigrity X — Redefining Signal And Power Integrity

This white paper highlights the features in Cadence Sigrity X signal and power integrity (SI/PI) solutions for system-level SI and PI analysis that enable designers to cut the number of design respins and meet short time-to-market windows with confidence. Click here to read more. » read more

FMEDA-Driven SoC Design Of Safety-Critical Semiconductors

As state-of-the-art electronics propel the automotive, industrial, and aerospace industry into a future of more connectivity and autonomy, the development of safety-compliant semiconductors is critical. The Cadence FMEDA-driven Safety Solution consists of products enhanced for advanced safety analysis, safety verification, and safety-aware implementation for digital driving analog and dig... » read more

Machine Learning Based MBIST Area Estimation

Majority of the silicon with-in a design is occupied by memories. Memories are more prone to failures than logic due to their density. Several techniques have been established to target and detect defects within these memory instances and their interfacing logic. The most widely used approach is memory built-in self-test (MBIST) that inserts on-chip hardware unit(s) which provides systematic me... » read more

System-Driven PPA For Multi-Chiplet Designs

As we approach the device scaling limitations at advanced nodes, the demand on compute performance and data transfer for hyperscale data center and AI designs is at an all-time high. Advanced systems-on-chip (SoCs) are reaching reticle size limits, and there has been a need to find innovative solutions to continue Moore’s law scaling and achieve performance improvements with reduced power. St... » read more

Demystifying Mixed-Signal Simulation For Digital Verification Engineers

The convergence of analog and digital technologies on a single chip, commonly referred to as mixed-signal, has reshaped the integrated circuit (IC) landscape. In recent years, mixed-signal designs have emerged as the dominant technology, therefore requiring traditional analog and digital methodologies to be enhanced. A mixed-signal design offers many advantages, including boosted performance, r... » read more

How The Productivity Advantages Of High-Level Synthesis Can Improve IP Design, Verification, And Reuse

Engineering teams are under more pressure than ever before—systems on chip (SoCs) are growing more complex and design schedules are increasingly tighter. With its productivity advantages, high-level synthesis (HLS) has long been touted as part of the solution, but its sweet spot has traditionally been limited to datapath-centric blocks. Moreover, design productivity is only one part of ... » read more

Thermal Warpage Simulation Of A Temperature-Dependent Linear Elastic Material Package

The shift to advanced packaging in 3D and 2.5D IC design is making the numerical analysis of thermal warpage in electronic devices a crucial part of the design process. A reliable numerical tool enables the designer to perform early design analysis that accurately predicts warpage, thereby shortening the design process. The Cadence Celsius Thermal Solver integrated within the Cadence IC, pac... » read more

Why A DSP Is Indispensable In The New World of AI

Chips being designed today for the automotive, mobile handset, AI-IoT (artificial intelligence - Internet of things), and other AI applications will be fabricated in a year or two, designed into end products that will hit the market in three or more years, and then have a product lifecycle of at least five years. These chips will be used in systems with a large number and various types of senso... » read more

Unleashing The Power Of Generative AI In Chip, System, And Product Design

The field of chip, system, and product design is a complex landscape, fraught with challenges that designers grapple with daily. The traditional design process, while robust, often falls short in addressing the increasing demands for efficiency, customization, and innovation. This white paper delves into these challenges, exploring the transformative potential of generative artificial int... » read more

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