Author's Latest Posts

FIR And Median Filter Accelerators In CodAL
By Codasip - 25 Oct, 2023 - Comments: 0

5G is the latest generation of cellular networks using the 3rd Generation Partnership Project (3GPP) 5G New Radio air interface. Unlike previous generations of network (2G, 3G & 4G) which had a one-size-fits-all approach, 5G aims to address a wide range of very different applications. To flexibly support diverse quality of service requirements, network slicing is introduced to enable mul... » read more

L31 Embedded Core Extensions For Wireless And Connectivity
By Codasip - 21 Jun, 2023 - Comments: 0

5G is the latest generation of cellular networks using the 3rd Generation Partnership Project (3GPP) 5G New Radio air interface. Unlike previous generations of network (2G, 3G & 4G), which had a one-size-fits-all approach, 5G aims to address a wide range of very different applications. To flexibly support diverse quality of service requirements, network slicing is introduced to enable multip... » read more

A Formal-Based Approach For Efficient RISC-V Processor Verification
By Codasip - 24 May, 2023 - Comments: 0

The openness of RISC-V allows customizing and extending the architecture and microarchitecture of a RISC-V based core to meet specific requirements. This appetite for more design freedom is also shifting the verification responsibility to a growing community of developers. Processor verification, however, is never easy. The very novelty and flexibility of the new specification results in new fu... » read more

Compact NN Accelerator In CodAL
By Codasip - 22 Mar, 2023 - Comments: 0

Recent years of IoT/IIoT evolution resulted in an important shift from cloud-level to device-level AI processing. It enables devices to run some AI tasks locally, thus minimizing security issues, data transfer costs, and latency. The ability to run AI/ML tasks becomes a must-have when selecting an SoC or MCU for IoT and IIoT applications. Embedded devices are typically resource-constrained, ... » read more

Efficient Verification Of RISC-V Processors
By Codasip - 22 Feb, 2023 - Comments: 0

For some time, application-specific instruction processors (ASIPs) have been developed for specialized applications. These have required multi-disciplinary teams with sufficient expertise to develop the instruction set, microarchitecture, and software toolchain. Few companies have had the right combination of skills to develop ASIPs so relatively few have been developed. With the advent of R... » read more

Extending RISC-V Processors In The Field With Codasip Studio & Menta eFPGA
By Codasip - 21 Dec, 2022 - Comments: 0

RISC-V is an open specification that allows an infinite number of implementations. But RISC-V goes beyond that and encourages processor architects to add new instructions to accelerate certain algorithms or application domains, for example DSP, AI/ML, and others, while keeping the base instruction set stable. The new instructions may help with the performance, code size, power consumption, or d... » read more

Semiconductor Scaling Is Failing — What Next For Processors?
By Codasip - 27 Apr, 2022 - Comments: 0

This in-depth paper looks at the changing dynamics in the semiconductor industry. In other words, why many companies are looking to customize their processor designs to keep pace with software and system demands. It goes onto highlight the opportunities available to companies of all sizes, in seeking to differentiate and specialize their processor designs. Click here to read more. » read more

Embedded AI On L-Series Cores
By Codasip - 23 Mar, 2022 - Comments: 0

Over the last few years there has been an important shift from cloud-level to device-level AI processing. The ability to run AI/ML tasks becomes a must-have when selecting an SoC or MCU for IoT and IIoT applications. Embedded devices are typically resource-constrained, making it difficult to run AI algorithms on embedded platforms. This paper looks at what could make it easier from a softwar... » read more

What You Should Consider When Choosing A Processor IP Core
By Codasip - 21 Apr, 2021 - Comments: 0

Most integrated circuits include at least one processor core and some embedded software. In the case of more complex systems-on-chip (SoC), there may be application processors running the main software, and operating system plus multiple specialised subsystems handling functions such as communications, security, and sensors. Requirements for processing vary considerably and there is a wide choi... » read more

A RISC-V ISA Extension For Ultra-Low Power IoT Wireless Signal Processing
By Codasip - 24 Mar, 2021 - Comments: 0

This work presents an instruction-set extension to the open-source RISC-V ISA (RV32IM) dedicated to ultra-low power (ULP) software-defined wireless IoT transceivers. The custom instructions are tailored to the needs of 8/16/32-bit integer complex arithmetic typically required by quadrature modulations. The proposed extension occupies only 2 major opcodes and most instructions are designed to co... » read more

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