David Abercrombie

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David Abercrombie is the marketing director for Calibre multi-patterning, machine-learning, and licensing applications at Siemens EDA, a part of Siemens Digital Industries Software. Abercrombie drives the roadmap for developing new and enhanced EDA tools to solve the growing challenges in advanced physical verification and design for manufacturing (DFM). Prior to joining Siemens, Abercrombie managed yield enhancement programs in semiconductor manufacturing at multiple companies. He is extensively published in papers and patents on semiconductor processing, yield enhancement, and physical verification. Abercrombie received his BSEE from Clemson University, and his MSEE from North Carolina State University.

Author's Latest Posts

Colorblind—Colorless versus Two-Color Double Patterning Design
By David Abercrombie - 05 Mar, 2012 - Comments: 0

By David Abercrombie People are always asking “What should I expect when I start designing at 20nm using double patterning?” It’s a good question, but in many real aspects, the answer is “It depends,” and that is not very satisfying to hear. The way that a designer will interact with the constraints that double patterning (DP) brings is very dependent on the design methodology used. ... » read more

To Cut or Not To Cut? That is the Double Patterning Question
By David Abercrombie - 14 Dec, 2011 - Comments: 1

By David Abercrombie The challenges of double pattering (DP)-based design are looming large to those customers starting to move to the 20 nm technology node. Of course, much of the fear and trepidation is simply due to it being something new to learn, and the sense of risk that a move into the unknown can instill. Regardless of emotions involved, DP does place new restrictions on physical la... » read more

The Genealogy of DFM
By David Abercrombie - 07 Oct, 2011 - Comments: 0

By David Abercrombie Family histories are all the rage these days. With the advent of online databases, what was once a difficult and expensive task is now accessible to anyone with Internet access. Not only can you investigate census data, immigration records, and military service records with ease, but some sites also allow you to access information compiled by other site members. All of a... » read more

Debugging Double Patterning without Getting Double Vision
By David Abercrombie - 27 Jul, 2011 - Comments: 1

By David Abercrombie Given that my last couple of blogs on double patterning (DP) might have scared you to death, I figured it was time to bring you some good news. It is unavoidably true that double patterning layout constraints at 20nm and below are going to require changes in all aspects of the design flow, but Mentor Graphics (and, I am sure, the rest of the EDA industry) is working very... » read more

Double Patterning: Sharing the Benefit and the Burden
By David Abercrombie - 01 Jun, 2011 - Comments: 0

By David Abercrombie Share and share alike! Our mothers always said it was the right thing to do, and it seems that this ideology is now coming front and center for double patterning at 20nm and below. As we continue to shrink the metal pitch from node to node, we also push the lithography k1 lower and lower, since we are currently stuck with 193nm/1.35NA scanners. When k1 dropped below 0.6,... » read more

Double Patterning Requires a Double Take
By David Abercrombie - 24 Mar, 2011 - Comments: 0

By David Abercrombie As the unstoppable progression of Moore’s law has driven the semiconductor technology roadmap farther and farther below 1 µm, a steady stream of engineering marvels has been required to produce leading edge chips. For most of that roadmap, the enabling engineering solutions were on the processing side. For instance, the development of i-line, then KrF and ArF light so... » read more

DFM: Out of the Spotlight and Into the Trenches
By David Abercrombie - 03 Feb, 2011 - Comments: 0

By Joe Davis and David Abercrombie The year is 2006. Everywhere you look, the phrase “Design for Manufacturing” or its acronym, DFM, is being brandished as if it were the banner of some brave new army of chip designers. “DFM is the solution to discontinuity issues at 65 nm.” “Traditional boundaries between design and manufacturing will vanish.” Articles and papers discussing DFM ... » read more

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