Author's Latest Posts


Cracking The Memory Wall


Processor performance continues to improve exponentially, with more processor cores, parallel instructions, and specialized processing elements, but it is far outpacing improvements in bandwidth and memory. That gap, the so-called memory wall, has persisted throughout most of this century, but now it is becoming more pronounced. SRAM scaling is slowing at advanced nodes, which means SRAM takes ... » read more

Using AI In Semiconductor Inspection


AI is exceptionally good at spotting anomalies in semiconductor inspection. The challenge is training different models for different inspection tools and topographies, and knowing which model to use at any particular time. Different textures in backgrounds are difficult for traditional algorithms, for example. But once machine learning models are trained properly, they have proven effective in ... » read more

PCIe Over Optics


Moving data through a chip or package, and between packages and systems, is becoming a much bigger challenge as the volume of data continues to explode, and as more compute resources are deployed to work on data-intensive problems such as training AI algorithms or running long and complex simulations. There is more data to process in more places, more levels of data storage and access, and any ... » read more

The Road To Super Chips


Reticle size limitations are forcing chip design teams to look beyond a single SoC or processor in order to achieve orders of magnitude improvements in processing that are required for AI. But moving data between more processing elements adds a whole new set of challenges that need to be addressed at multiple levels. Steve Woo, distinguished inventor and fellow at Rambus, examines the benefits ... » read more

Livelocks And Deadlocks In NoCs


Devices that are stuck in a specific state, or which appear to be making progress even though they are not, are common problems in complex systems. Processing elements need to fetch data they don't have from routers may be frozen out by other processors, a problem that is exacerbated by common bus protocols. Ashish Darbari, CEO of Axiomise, talks about how to identify potential bottlenecks, why... » read more

EDA Revenue Hit Record High In Q3


EDA and IP revenue increased 8.8% in Q3 2024, dragged down from the double-digit growth of recent quarters by a softening in sales to China, according to the most recent report by SEMI. For more than a decade, China's growth propped up the entire tools industry, reporting consistent double-digit growth growth that reached as high as 40% quarter over quarter. But with ongoing trade restrictio... » read more

Edge And IoT Security Turning A Corner


Security is beginning to improve for a wide range of IoT and edge devices due to better tools, the implementation of new standards and methodologies, and an increasing level of collaboration and communication across different market segments that in the past had little or no interaction. Until recently, many vendors in cost-sensitive markets offered the bare minimum of security. To make matt... » read more

Distributed Voltage And Frequency Scaling Gaining Traction


DVFS has been used in smart phones for more than a decade as a way of trading off power and performance when both are constrained, but much of the semiconductor industry has avoided this technique because it's too difficult to work with. That's starting to change as processing demands increase, driven by the rollout of AI everywhere and an increase in the number of features in advanced packages... » read more

Why Chips Fail, And What To Do About It


Experts at the Table: Semiconductor Engineering sat down to discuss reliability of chips in the context of safety- and mission-critical systems, as well as increasing utilization due to an explosion in AI data, with Steve Pateras, vice president of marketing and business development at Synopsys; Noam Brousard, vice president of solutions engineering at proteanTecs; Harry Foster, chief verificat... » read more

Speeding Up Acoustic Wafer Inspection


Higher density and more vertical layers require higher-resolution inspection. In the past that generally resulted in longer scan times, which can slow throughput in the fab or assembly house. Bryan Schackmuth, senior product line manager at Nordson Test & Inspection, explains how rotational scanning using acoustic wafer inspection can speed up inspection time by a factor of eight, why it is... » read more

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