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Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

Author's Latest Posts

The Impact Of ML On Chip Design
By Ed Sperling - 22 May, 2023 - Comments: 0

Node scaling and rising complexity are increasing the time it takes to get chips out the door. At the same time, design teams are not getting larger. What is needed is a way to automate the creative process, and to not have to start every design from scratch. This is where reinforcement learning fits in, with its ability to centralize and store “tribal knowledge. Thomas Andersen, vice preside... » read more

Chips Getting More Secure, But Not Quickly Enough
By Ed Sperling - 22 May, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the impact of heterogeneous integration, more advanced RISC-V designs, and a growing awareness of security threats, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketin... » read more

Challenges In Packaging 5G And 6G
By Ed Sperling - 16 May, 2023 - Comments: 0

Millimeter wave frequencies are essential for transferring more data more quickly, but they also require different packaging technology to minimize loss and drift. That opens up a number of tradeoffs around antenna in package, antenna on package, flexible circuits, and different substrates. Curtis Zwenger, vice president of R&D at Amkor Technology, talks about a host of new challenges rangi... » read more

LPDDR Flash In Automotive
By Ed Sperling - 15 May, 2023 - Comments: 0

New automotive architectures are raising challenges for how to utilize memory effectively and efficiently. An LPDDR interface for flash allows different processors to utilize multiple banks of flash memory, which in turn reduces latency and interference. Sandeep Krishnegawda, vice president of marketing and applications at Infineon, talks about the new zonal controllers in automotive design and... » read more

Challenges In Writing SDC Constraints
By Ed Sperling - 08 May, 2023 - Comments: 0

Writing design constraints is becoming more difficult as chips become more heterogeneous, and as they are expected to function longer in the field. Timing and power can change over time, and constraints need to be adjusted to that changing context. Synopsys’ Ajay Daga, group director for R&D at Synopsys, talks about the challenges in pushing constraints down to different hierarchical portions... » read more

Data Leakage Becoming Bigger Issue For Chipmakers
By Ed Sperling - 04 May, 2023 - Comments: 0

Data leakage is becoming more difficult to stop or even trace as chips become increasingly complex and heterogeneous, and as more data is stored and utilized by chipmakers for other designs. Unlike a cyberattack, which typically is done for a specific purpose, such as collecting private data or holding a system ransom, data leaks can spring up anywhere. And as the value of data increases, th... » read more

EDA Makes A Frenzied Push Into Machine Learning
By Ed Sperling - 27 Apr, 2023 - Comments: 0

Machine learning is becoming a competitive prerequisite for the EDA industry. Big chipmakers are endorsing and demanding it, and most EDA companies are deploying it for one or more steps in the design flow, with plans to add much more over time. In recent weeks, the three largest EDA vendors have made sweeping announcements about incorporating ML into their tools at their respective user eve... » read more

Programmable General-Purpose I/O
By Ed Sperling - 24 Apr, 2023 - Comments: 0

Talking to many different kinds of chips is becoming more complicated. There are new types of transistors, new protocols, and all of this is limited by the number of pins. Geoff Tate, CEO of Flex Logix, talks about adding programmability into the general-purpose I/O to enable more flexibility, lower inventory, and reduced obsolescence. » read more

IC Security Issues Grow, Solutions Lag
By Ed Sperling - 24 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the growing chip security threat and what's being done to mitigate it, with Mike Borza, Synopsys scientist; John Hallman, product manager for trust and security at Siemens EDA; Pete Hardee, group director for product management at Cadence; Paul Karazuba, vice president of marketing at Expedera; and Dave Kelf, CEO of Breker V... » read more

100G Ethernet At The Edge
By Ed Sperling - 19 Apr, 2023 - Comments: 0

The amount of data is growing, and so is the need to process it closer to the source. The edge is a middle ground between the cloud and the end point, close enough to where data is generated to reduce the time it takes to process that data, yet still powerful enough to analyze that data quickly and send it wherever it is needed. But to make this all work requires faster conduits for that data i... » read more

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