Author's Latest Posts


Efficient Trace In RISC-V


Systems with RISC-V cores often include multiple types of other processors and accelerators. Peter Shields, product manager for Tessent at Siemens Digital Industries Software, talks about what's needed for debug and trace in context, including the need for unobtrusive observation at full speed, what to trace and when to trace it, and how embedded IP can identify to report which branches are tak... » read more

Heterogeneous Integration Issues And Developments


There are a slew of new developments in advanced packaging, from new materials, chiplets, and interconnect schemes, to challenges involving how to physically put chips in a package, metallization, thermal cycling, and parasitics in the interconnect path. Dick Otte, CEO of Promex Industries, talks about how this will change chip design and manufacturing, and how those changes are likely to unfol... » read more

Increased Photomask Density And Its Impact On EDA


The ability to print curvilinear shapes on photomasks can have big repercussions on semiconductor design. Aki Fujimura, CEO of D2S, explains why mask rule checking has been bound by complex design rules, and why curvilinear shapes are important for reducing margin and simplifying the chip design process. » read more

Silent Data Corruption


Defects can creep into chip manufacturing from anywhere, but the problem is getting worse at advanced nodes and in advanced packages where reduced pin access can make testing much more difficult. Ira Leventhal, vice president of U.S. Applied Research and Technology at Advantest America, talks about what’s causing these so-called silent data errors, how to find them, and why it now requires ma... » read more

Improving Chip Efficiency, Reliability, And Adaptability


Peter Schneider, director of Fraunhofer Institute for Integrated Circuits' Engineering of Adaptive Systems Division, sat down with Semiconductor Engineering to talk about new models and approaches for ensuring the integrity and responsiveness of systems, and how this can be done within a given power budget and at various speeds. What follows are excerpts of that conversation. SE: Where are y... » read more

Why Matter 1.0 Really Matters


Incompatibilities of consumer devices inside the home are frustrating for consumers and a security risk. Skip Ashton, distinguished engineer at Infineon, talks about how the Matter 1.0 standard will fuse together different ecosystems from companies such as Apple, Google, and Amazon, how it will be applied to existing devices, what’s included and missing from the standard today, and how it can... » read more

Making Chips Yield Faster At Leading-Edge Nodes


Simulation for semiconductor manufacturing is heating up, particularly at the most advanced nodes where data needs to be analyzed in the context of factors such as variation and defectivity rates. Semiconductor Engineering sat down with David Fried, corporate vice president of computational products at Lam Research, to talk about what's behind Lam's recent acquisition of Esgee Technologies, ... » read more

Where All The Semiconductor Investments Are Going


Companies and countries are funneling huge sums of money into semiconductor manufacturing, materials, and research — at least a half-trillion dollars over the next decade, and maybe much more — to guarantee a steady supply of chips and know-how to support growth across a wide swath of increasingly data-centric industries. The build-out of a duplicate supply chain that can guarantee capac... » read more

Managing IP In Heterogeneous Designs


Increasing complexity and heterogeneity is creating huge challenges for tracking different versions of IP over the lifetime of chips. Pedro Pires, applications engineer at ClioSoft, talks about the implications of IP reuse in a complex, multi-IP context, including how different standards and database formats can affect IP tracking and why an interoperability layer is essential to tracking IP an... » read more

Automated Optical Inspection


Building good automated models for inspection require more data to be collected, both good and bad. Vijay Thangamariappan, R&D engineer at Advantest, explains how to develop models for automating optical inspection, using a multi-thousand pin socket as an example for how machine learning has helped reduce the return rate due to defects from 2% down to zero. He also explains how to achieve t... » read more

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