Author's Latest Posts


Next-Gen High-Speed Communication In Data Centers


Data centers are being flooded with data. While more of it needs to be processed locally, much of it also needs to be moved around within a system and between systems. This has put a spotlight on a variety of new optical technologies and methodologies. Yang Zhang, senior product marketing manager at Cadence, talks about the rapid increase in different types of optics and optical scenarios being... » read more

3.5D: The Great Compromise


The semiconductor industry is converging on 3.5D as the next best option in advanced packaging, a hybrid approach that includes stacking logic chiplets and bonding them separately to a substrate shared by other components. This assembly model satisfies the need for big increases in performance while sidestepping some of the thorniest issues in heterogeneous integration. It establishes a midd... » read more

Real-World Applications Of Computational Fluid Dynamics


More powerful chips are enabling chips to process more data faster, but they're also having a revolutionary impact on how that data can be used. Simulations that used to take days or weeks now can be completed in a matter of hours, and multi-physics simulations that were implausible to even consider are now very much in the realm of what is possible. Parviz Moin, professor of mechanical enginee... » read more

Making Electronics More Efficient


Projections about the amount of energy required for AI in data centers and other electronic devices are putting a spotlight on more efficient electronics. But making chips and systems more efficient is an enormous challenge. It used to be as simple as turning down the voltage or moving to the next process node, but those approaches are no longer yielding the same kinds of benefits as in the pas... » read more

Where Power Savings Really Count


Experts at the Table: Semiconductor Engineering sat down to discuss why and where improvements in architectures and data movement will have the biggest impact, with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice presi... » read more

Toward Software-Defined Vehicles


Speed is everything when it comes to designing automotive electronics, but not in the usual way. In the past, product cycles often lasted five to seven years, from initial design to implementation inside of vehicles. That no longer works as vehicles adopt more electronic features to replace mechanical ones, and as competition heats up over the latest features and nearly instantaneous over-the-a... » read more

Managing kW Power Budgets


Experts at the Table: Semiconductor Engineering sat down to discuss increasing power demands and how to address it with Hans Yeager, senior principal engineer, architecture, at Tenstorrent; Joe Davis, senior director for Calibre interfaces and EM/IR product management at Siemens EDA; Mo Faisal, CEO of Movellus; Trey Roessig, CTO and senior vice president of engineering at Empower Semiconductor.... » read more

EDA Revenue Up, China Weak


EDA and hardware IP revenue grew 14.4% to $4.522 billion in Q1, extending a streak that began several years ago with unabated double-digit growth. But the upbeat report masked a sharp sales drop in China for reasons that have yet to be determined. Revenue in the overall Asia/Pacific region grew a healthy 19% YoY, while China was -6.3%. The negative impact was offset by new strength in India,... » read more

Intel Vs. Samsung Vs. TSMC


The three leading-edge foundries — Intel, Samsung, and TSMC — have started filling in some key pieces in their roadmaps, adding aggressive delivery dates for future generations of chip technology and setting the stage for significant improvements in performance with faster delivery time for custom designs. Unlike in the past, when a single industry roadmap dictated how to get to the next... » read more

Changes In Formal Verification


For the better part of two decades, formal verification was considered too difficult to use in many designs and too slow for anything but narrow bug hunting. Much has changed recently. Ashish Darbari, CEO of Axiomise, explains why formal is now essential for finding deadlocks, security holes, and Xprop issues in mission-critical, safety-critical, and AI designs, and how that will apply to chipl... » read more

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