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Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

Author's Latest Posts

Hardware Attack Surface Widening
By Ed Sperling - 06 Feb, 2020 - Comments: 0

An expanding attack surface in hardware, coupled with increasing complexity inside and outside of chips, is making it far more difficult to secure systems against a variety of new and existing types of attacks. Security experts have been warning about the growing threat for some time, but it is being made worse by the need to gather data from more places and to process it with AI/ML/DL. So e... » read more

Bigger, Faster, More Diverse And Expensive
By Ed Sperling - 06 Feb, 2020 - Comments: 0

Aart de Geus, chairman and co-CEO of Synopsys, sat down with Semiconductor Engineering to talk about the race toward AI everywhere, how splintering markets are affecting design, and why software is now such a critical component of hardware development. SE: We're seeing big advances in compute performance due to advanced packaging and heterogeneous architectures. Is that sustainable? de Ge... » read more

Ensuring Functional Safety In Design
By Ed Sperling - 05 Feb, 2020 - Comments: 0

Mohammed Abdelwahid (Ali), automotive logic test product manager at Mentor, a Siemens Business, discusses how to maximize coverage in the different ASIL standards for logic BiST, how to make testing more efficient, and what impact that has on area and test time. » read more

Ensuring Coverage In Large SoCs
By Ed Sperling - 04 Feb, 2020 - Comments: 0

Sven Beyer, product manager for design verification at OneSpin Solutions, talks about why formal technology is required to ensure coverage in some of the newest chips, how it deals with potential interactions and different use cases, and why it is gaining traction in automotive applications. » read more

Context-Aware Debug
By Ed Sperling - 31 Jan, 2020 - Comments: 0

Moses Satyasekaran, product manager at Mentor, a Siemens Business, examines the growing complexity of debug, which now includes software, power intent and integration, multiple clocking and reset domains, and much more, where the limitations are for debug, and how automotive, functional safety and mixed signal affect the overall process. » read more

Chips, Business And The Coronavirus
By Ed Sperling - 30 Jan, 2020 - Comments: 2

In the spring of 2003, the SARS (severe acute respiratory syndrome) hit China and Hong Kong, creating such panic that no one would touch crates on shipping docks. Ultimately, it erased an estimated $40 billion from the global economy and effectively shut down the Chinese semiconductor industry for several months. It could have been much worse, though, and this is what is particularly troubli... » read more

Addressing IC Security Threats Before And After They Emerge
By Ed Sperling - 29 Jan, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss different approaches to security with Warren Savage, research scientist in the Applied Research Laboratory for Intelligence and Security at the University of Maryland; Neeraj Paliwal, vice president and general manager of Rambus Security; Luis Ancajas, marketing director for IoT security software solutions at Micron; Doug Suerich, product evangelist... » read more

Tradeoffs In Embedded Vision SoCs
By Ed Sperling - 28 Jan, 2020 - Comments: 0

Gordon Cooper, product marketing manager for embedded vision processors at Synopsys, talks with Semiconductor Engineering about the need for more performance in these devices, how that impacts power, and what can be done to optimize both prior to manufacturing. » read more

Analog Simulation At 7/5/3nm
By Ed Sperling - 27 Jan, 2020 - Comments: 0

Hany Elhak, group director of product management at Cadence, talks with Semiconductor Engineering about analog circuit simulation at advanced nodes, why process variation is an increasing problem, the impact of parasitics and finFET stacking, and what happens when gate-all-around FETs are added into the chip. » read more

Thermal Guardbanding
By Ed Sperling - 24 Jan, 2020 - Comments: 0

Stephen Crosher, CEO of Moortec, looks at the causes of thermal runaway in racks of servers and explains why accurate temperature measurement in AI and advanced-node chips is more critical, and what impact this has on performance when temperatures begin approaching acceptable limits. » read more

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