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Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

Author's Latest Posts

Reducing Data At The Source
By Ed Sperling - 18 Nov, 2019 - Comments: 0

Jens Döge, group manager for image acquisition and processing in Fraunhofer IIS’ Engineering of Adaptive Systems Division, talks about how to slash the amount of data that needs to be sent to the cloud or edge for processing by focusing only on the regions of interest in an image, and how that reduces the cost of moving that data. » read more

GDDR6 Drilldown: Applications, Tradeoffs And Specs
By Ed Sperling - 15 Nov, 2019 - Comments: 0

Frank Ferro, senior director of product marketing for IP cores at Rambus, drills down on tradeoffs in choosing different DRAM versions, where GDDR6 fits into designs versus other types of DRAM, and how different memories are used in different vertical markets. » read more

AI’s Impact On Power And Performance
By Ed Sperling - 14 Nov, 2019 - Comments: 0

AI/ML is creeping into everything these days. There are AI chips, and there are chips that include elements of AI, particularly for inferencing. The big question is how well they will affect performance and power, and the answer isn't obvious. There are two main phases of AI, the training and the inferencing. Almost all training is done in the cloud using extremely large data sets. In fact, ... » read more

Using Machine Learning To Break Down Silos
By Ed Sperling - 13 Nov, 2019 - Comments: 0

Jeff David, vice president of AI solutions at PDF Solutions, talks with Semiconductor Engineering about where machine learning can be applied into semiconductor manufacturing, how it can be used to break down silos around different process steps, how active learning works with human input to tune algorithms, and why it’s important to be able to choose different different algorithms for differ... » read more

Addressing Pain Points In Chip Design
By Ed Sperling - 13 Nov, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the impact of multi-physics and new market applications on chip design with John Lee, general manager and vice president of ANSYS' Semiconductor Business Unit; Simon Burke, distinguished engineer at Xilinx, Duane Boning, professor of electrical engineering and computer science at MIT; and Thomas Harms, director EDA/IP Alliance at Infineon. What foll... » read more

AI’s Blind Spots
By Ed Sperling - 12 Nov, 2019 - Comments: 1

The rush to utilize AI/ML in nearly everything and everywhere raises some serious questions about how all of this technology will evolve, age and perform over time. AI is very useful at doing certain tasks, notably finding patterns and relationships in broad data sets that are well beyond the capabilities of the human mind. This is very valuable for adding efficiency into processes of all so... » read more

Different Ways To Improve Chip Reliability
By Ed Sperling - 12 Nov, 2019 - Comments: 1

A push toward greater reliability in safety- and mission-critical applications is prompting some innovative approaches in semiconductor design, manufacturing, and post-production analysis of chip behavior. While quality over time has come under intensive scrutiny in automotive, where German carmakers require chips to last 18 years with zero defects, it isn't the only market demanding extende... » read more

Leveraging Data In Chipmaking
By Ed Sperling - 12 Nov, 2019 - Comments: 0

John Kibarian, president and CEO of PDF Solutions, sat down with Semiconductor Engineering to talk about the impact of data analytics on everything from yield and reliability to the inner structure of organizations, how the cloud and edge will work together, and where the big threats are in the future. SE: When did you recognize that data would be so critical to hardware design and manufact... » read more

How 5G Affects Test
By Ed Sperling - 11 Nov, 2019 - Comments: 0

David Hall, head of semiconductor marketing at National Instruments, talks with Semiconductor Engineering about architectural changes to infrastructure due to the rollout of 5G and how the move from macrocells to small cells is changing test requirements.         Subscribe to Semiconductor Engineering's YouTube Channel here » read more

The Last Mile
By Ed Sperling - 07 Nov, 2019 - Comments: 0

The race to autonomous driving is looking a lot less like a race these days. German automakers pushed the likely date for Level 5 autonomous driving back to 2032 from 2027, according to attendees at the International Congress for Automotive Electronics (ELIV) in Bonn last month. There are a number of reasons for this. The first is cost. The amount of processing needed to make the split-secon... » read more

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