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Ed Sperling

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Ed Sperling is the editor in chief of Semiconductor Engineering.

Author's Latest Posts

Surround And Conquer
By Ed Sperling - 22 Aug, 2019 - Comments: 0

The processor wars are back in full swing, this time with some new players in the field. But what defines winning this time around is far less obvious than it was in the past, and it will take years before we know the outcome. The strategy is the same, though, and it's one that has been in use for years in the tech world. It began in the 1990s, when IBM came to the realization that it could ... » read more

Chiplets, Faster Interconnects, More Efficiency
By Ed Sperling - 22 Aug, 2019 - Comments: 1

Big chipmakers are turning to architectural improvements such as chiplets, faster throughput both on-chip and off-chip, and concentrating more work per operation or cycle, in order to ramp up processing speeds and efficiency. Taken as a whole, this represents a significant shift in direction for the major chip companies. All of them are wrestling with massive increases in processing demands ... » read more

Siemens-Mentor Deal Retrospective
By Ed Sperling - 21 Aug, 2019 - Comments: 1

Tony Hemmelgarn, president and CEO of Siemens PLM Software and CEO of Mentor, a Siemens Business, sat down with Semiconductor Engineering to talk about the acquisition of Mentor Graphics, the shift toward more customized design, and where AI fits into the design picture. SE: How does a company like Siemens see the EDA industry evolving? Hemmelgarn: Part of the reason we bought Mentor Grap... » read more

Advanced Packaging Options Increase
By Ed Sperling - 19 Aug, 2019 - Comments: 0

Designing, integrating and assembling heterogeneous packages from blocks developed at any process node or cost point is proving to be far more difficult than expected, particularly where high performance is one of the main criteria. At least part of the problem is there is a spectrum of choices, which makes it hard to achieve economies of scale. Even where there is momentum for a particular ... » read more

Why Scaling Must Continue
By Ed Sperling - 15 Aug, 2019 - Comments: 3

The entire semiconductor industry has come to the realization that the economics of scaling logic are gone. By any metric—price per transistor, price per watt, price per unit area of silicon—the economics are no longer in the plus column. So why continue? The answer is more complicated than it first appears. This isn't just about inertia and continuing to miniaturize what was proven in t... » read more

Manufacturing Printed Sensors
By Ed Sperling - 15 Aug, 2019 - Comments: 0

Vijaya Kayastha, lead device development engineer at Brewer Sciences, talks about the different approaches for different printed sensors, why each of those requires different skill levels for scaling up the process, and why this technology will be so important for industrial and IoT applications. » read more

Speed Returns As The Key Metric
By Ed Sperling - 08 Aug, 2019 - Comments: 0

For the foreseeable future, it's all about performance. For the past decade or so, power and battery life have been the defining characteristics of chip design. Performance was second to those. This was particularly important in smart phones and wearable devices, where time between charges was a key selling point. In fact, power-hungry processors killed the first round of smart watches. But ... » read more

In-Memory Computing
By Ed Sperling - 08 Aug, 2019 - Comments: 1

Gideon Intrater, CTO at Adesto Technologies, talks about why in-memory computing is now being taken seriously again, years after it was first proposed as a possible option. What's changed is an explosion in data, and a recognition that it's too time- and energy-intensive to send all of that data back and forth between memories and processors on the same chip, let alone to the cloud and back. On... » read more

Process Window Optimization
By Ed Sperling - 07 Aug, 2019 - Comments: 0

David Fried, vice president of computational products at Lam Research, examines increasing process variation and interactions between various types of variation, why different approaches are necessary to improve yield and continue scaling. » read more

The Great Test Blur
By Ed Sperling - 06 Aug, 2019 - Comments: 0

As chip design and manufacturing shift left and right, concerns over reliability are suddenly front and center. But figuring out what exactly what causes a chip to malfunction, or at least not meet specs for performance and power, is getting much more difficult. There are several converging trends here, each of which plays an integral role in improving reliability. But how significant a role... » read more

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