Author's Latest Posts

How To Improve Yield Ramp For New Designs And Technology Nodes

The complicated silicon defect types and defect distribution of new IC manufacturing technologies can result in very low yield for new designs and technology nodes. During technology qualification using test chips, scan chain failures account for most of the chip failures. Diagnosing those scan chain defects is a powerful way to uncover new and systematic defects. The chip maker’s goal is ... » read more

Novel Reversible Chain Diagnosis Improves Resolution

Yield ramp for ICs designed on advanced process technologies faces new challenges because of the very complicated silicon defect types and defect distribution. Yield ramp and yield improvement are not just about profitability and time-to-market, but also have a role in today’s electronics supply chain crisis. That means yield ramp affects not just the IC maker, but the global economy. Ever... » read more

Highly Efficient Scan Diagnosis With Dynamic Partitioning

Charged with the task of improving yield, product engineers need to find the location of defects in manufactured ICs quickly and efficiently. Typically, they use volume scan diagnosis to generate large amounts of data from failing test cycles, which is then analyzed to reveal the location of defects. Scan failure data provides the basis for many decisions in the failure analysis and yield impro... » read more