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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Research Bits: Jan. 13
By Jesse Allen - 13 Jan, 2025 - Comments: 0

High-temp electrochemical memory Researchers from the University of Michigan and Sandia National Laboratory propose a nonvolatile electrochemical memory that can store and rewrite information at temperatures over 1100°F (600°C), enabling it to continue working in environments as extreme as the surface of Venus. Instead of transporting electrons, the memory moves oxygen ions between layere... » read more

Startup Funding: Q4 2024
By Jesse Allen - 08 Jan, 2025 - Comments: 0

The fourth quarter of 2024 saw five mega-rounds of over $100 million. One of the hottest areas continues to be AI hardware, with one company developing RISC-V AI processor IP bringing in nearly $700 million in the largest round for a chip design startup this year. It was far from the only AI startup, however, as several companies gathered support for neuromorphic designs focused on ultra-low po... » read more

Blog Review: Jan. 8
By Jesse Allen - 08 Jan, 2025 - Comments: 0

Cadence's Igor Krause unravels the different Orthogonal Header Content (OHC) types in PCIe 6.0, which work as an extra header for the Transaction Layer Packet (TLP) that incorporates information fields that are needed depending on the TLP type. Siemens EDA's Yunhong Min considers how AI and machine learning are reshaping functional verification workflows from translating specifications to de... » read more

Research Bits: Jan. 7
By Jesse Allen - 07 Jan, 2025 - Comments: 0

Deep UV microLED for maskless lithography Researchers from the Hong Kong University of Science and Technology, Southern University of Science and Technology, and the Suzhou Institute of Nanotechnology developed an aluminum gallium nitride deep-ultraviolet microLED display array for maskless lithography.  They also built a maskless lithography prototype platform. "The team achieved key brea... » read more

Research Bits: Dec. 24
By Jesse Allen - 24 Dec, 2024 - Comments: 0

Growing multilayered chips Researchers from MIT, Samsung Advanced Institute of Technology, Sungkyunkwan University, and University of Texas at Dallas developed a method to fabricate a multilayered chip with alternating layers of semiconducting material grown directly on top of each other. The approach enables high-performance transistors and memory and logic elements on any random crystalline ... » read more

Blog Review: Dec. 18
By Jesse Allen - 18 Dec, 2024 - Comments: 0

Siemens’ Michael Munsey predicts that the convergence of AI, advanced packaging, and rise of software-defined products aren’t just incremental changes but will represent a fundamental shift in how we think about semiconductor design and manufacturing. Cadence's Veena Parthan points to hex-core voxels as a significant leap forward for the CFD meshing process that blends the best of struct... » read more

Research Bits: Dec. 16
By Jesse Allen - 16 Dec, 2024 - Comments: 0

Soft liquid metal vias Researchers from Virginia Tech and University of Pennsylvania found a way to create soft, flexible electric connections through circuit layers. The method could be used for soft robotics and wearable devices. The technique uses liquid metal microdroplets to create a stair-like structure that forms soft vias and planar interconnects through and across circuit layers wi... » read more

Research Bits: Dec. 11
By Jesse Allen - 11 Dec, 2024 - Comments: 0

Photonic AI processor Researchers from Massachusetts Institute of Technology (MIT), Enosemi, and Periplous developed a fully integrated photonic processor that can perform all the key computations of a deep neural network optically on the chip. The chip is fabricated using commercial foundry processes and uses three layers of devices that perform linear and nonlinear operations. A particula... » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2024 - Comments: 0

Siemens' Reetika explains how creating and verifying a complete reset tree structure allows designers to trace the flow of reset signals across the design and ensure that every sequential element is tagged correctly within its respective reset domain. Cadence's Durlov Khan suggests DDR5 DIMM Memory Models and Discrete Component Models as part of a flexible approach to validating specific com... » read more

Research Bits: Dec. 3
By Jesse Allen - 03 Dec, 2024 - Comments: 0

Self-assembly of mixed-metal oxide arrays Researchers from North Carolina State University and Iowa State University demonstrated a technique for self-assembling electronic devices. The proof-of-concept work was used to create diodes and transistors with high yield and could be used for more complex electronic devices. “Our self-assembling approach is significantly faster and less expensi... » read more

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