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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Research Bits: Feb. 4
By Jesse Allen - 04 Feb, 2025 - Comments: 0

High-power diamond transistors Researchers from the University of Glasgow, RMIT University, and Princeton University created a new diamond transistor for high-power electronics that remains switched off by default. The performance of the diamond was improved by coating it in hydrogen atoms followed by layers of aluminum oxide. “The challenge for power electronics is that the design of the... » read more

Blog Review: Jan. 29
By Jesse Allen - 29 Jan, 2025 - Comments: 0

Cadence's Reela Samuel looks beyond silicon to new semiconductor materials under development and the particular applications for gallium nitride, silicon carbide, indium phosphide, glass, and diamond. Siemens' Kyle Fraunfelter and Melville Bryant find that lean approaches alone cannot address the increasingly complex sustainability challenges of semiconductor manufacturing and call for the e... » read more

Research Bits: Jan. 28
By Jesse Allen - 28 Jan, 2025 - Comments: 0

Optical memory unit Researchers from Nokia Bell Labs developed a new type of optical memory called a programmable photonic latch that enables temporary data storage in optical processing systems. It is modeled after a set-reset latch. The integrated programmable photonic latch is based on optical universal logic gates using silicon photonic micro-ring modulators and can be implemented in co... » read more

Blog Review: Jan. 22
By Jesse Allen - 22 Jan, 2025 - Comments: 0

Cadence's David Shin provides an overview of the eUSB2V2 specification, which scales up to 4.8Gbps of data rate and provides the flexibility to configure either asymmetrical or symmetrical links depending on the intended application. Siemens EDA's Spencer Acain highlights the key role of AI in semiconductor testing, including the addition of analytical AI in DFT tools and how applying machin... » read more

Research Bits: Jan. 20
By Jesse Allen - 20 Jan, 2025 - Comments: 0

Self-correcting memristor array Researchers at Korea Advanced Institute of Science and Technology (KAIST), Seoul National University, Sungkyunkwan University, Electronics and Telecommunications Research Institute (ETRI), and Yonsei University developed a memristor-based neuromorphic chip that can learn and correct errors, enabling it to adapt to immediate environmental changes. The system c... » read more

Blog Review: Jan. 15
By Jesse Allen - 15 Jan, 2025 - Comments: 0

Siemens EDA's Stephen V. Chavez argues that the placement of decoupling capacitors on a PCB can make or break a design's power delivery system and provides some best practices and design considerations, such as ensuring even distribution on a board rather than crowding them around chips. Synopsys' Stelios Diamantidis predicts that in 2025, AI agents will begin collaborating with other AI age... » read more

Research Bits: Jan. 13
By Jesse Allen - 13 Jan, 2025 - Comments: 0

High-temp electrochemical memory Researchers from the University of Michigan and Sandia National Laboratory propose a nonvolatile electrochemical memory that can store and rewrite information at temperatures over 1100°F (600°C), enabling it to continue working in environments as extreme as the surface of Venus. Instead of transporting electrons, the memory moves oxygen ions between layere... » read more

Startup Funding: Q4 2024
By Jesse Allen - 08 Jan, 2025 - Comments: 0

The fourth quarter of 2024 saw five mega-rounds of over $100 million. One of the hottest areas continues to be AI hardware, with one company developing RISC-V AI processor IP bringing in nearly $700 million in the largest round for a chip design startup this year. It was far from the only AI startup, however, as several companies gathered support for neuromorphic designs focused on ultra-low po... » read more

Blog Review: Jan. 8
By Jesse Allen - 08 Jan, 2025 - Comments: 0

Cadence's Igor Krause unravels the different Orthogonal Header Content (OHC) types in PCIe 6.0, which work as an extra header for the Transaction Layer Packet (TLP) that incorporates information fields that are needed depending on the TLP type. Siemens EDA's Yunhong Min considers how AI and machine learning are reshaping functional verification workflows from translating specifications to de... » read more

Research Bits: Jan. 7
By Jesse Allen - 07 Jan, 2025 - Comments: 0

Deep UV microLED for maskless lithography Researchers from the Hong Kong University of Science and Technology, Southern University of Science and Technology, and the Suzhou Institute of Nanotechnology developed an aluminum gallium nitride deep-ultraviolet microLED display array for maskless lithography.  They also built a maskless lithography prototype platform. "The team achieved key brea... » read more

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