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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Research Bits: April 22
By Jesse Allen - 22 Apr, 2025 - Comments: 0

PIC heterogeneous integration Researchers from Hewlett Packard Labs, Indian Institutes of Technology Madras, Microsoft Research, and University of Michigan built an AI acceleration platform based on heterogeneously integrated photonic ICs. The PIC combines silicon photonics along with III-V compound semiconductors that functionally integrate lasers and optical amplifiers to reduce optical l... » read more

Blog Review: Apr. 16
By Jesse Allen - 16 Apr, 2025 - Comments: 0

Siemens’ Tova Levy finds that heterogeneous integration necessitates a shift to a system-level technology co-optimization approach where power, performance, area, cost, and reliability are considered across various components, including silicon, package, interposer, and PCB. Synopsys’ Greg Sorber listens in as Arm’s Rene Haas and Synopsys’ Sassine Ghazi discuss the opportunity for AI... » read more

Research Bits: Apr. 15
By Jesse Allen - 15 Apr, 2025 - Comments: 0

Shape-morphing OLED panel with built-in speaker Researchers from Pohang University of Science and Technology (POSTECH) developed a flexible OLED panel that can freely transform its shape while simultaneously functioning as a speaker. The design is based on a based on a specialized ultra-thin piezoelectric polymer actuator that when integrated into a flexible OLED panel enables electrically ... » read more

Research Bits: Apr. 7
By Jesse Allen - 07 Apr, 2025 - Comments: 0

DNA scaffolds for 3D electronics Researchers from Columbia University, Brookhaven National Laboratory, and University of Minnesota used DNA to help create self-assembled 3D electronic devices with nanometer-size features. The team deposited arrays of gold squares on a surface, onto which they could attach short pieces of DNA. These served as anchors to which they could fasten eight-sided di... » read more

Startup Funding: Q1 2025
By Jesse Allen - 02 Apr, 2025 - Comments: 0

The first quarter of 2025 saw six companies raise at least $100 million in investment. Of those, three went to quantum hardware companies, with major investment into neutral atom, superconducting, and hybrid quantum control approaches. AI chips and enabling technology were another big winner in the quarter, with companies developing optical communications tech for chips and data center infra... » read more

Blog Review: Apr. 2
By Jesse Allen - 02 Apr, 2025 - Comments: 0

Synopsys’ Meenakshy Ramachandran explores how DisplayPort Automotive Extensions help meet functional safety and security standards for the increasingly higher-resolution and more immersive in-vehicle displays in connected, autonomous, shared, and electric vehicles. Siemens’ Gabriella Leone and Michael Munsey discuss the need for a collaborative semiconductor business platform and how to ... » read more

Research Bits: Apr. 1
By Jesse Allen - 01 Apr, 2025 - Comments: 0

Neuro-synaptic RAM Researchers from the National University of Singapore (NUS) and King Abdullah University of Science and Technology (KAUST) found that a standard silicon transistor can function like a biological neuron and synapse when arranged and operated in a specific way. The team was able to replicate both neural firing and synaptic weight changes by adjusting the resistance of the b... » read more

Blog Review: Mar. 26
By Jesse Allen - 26 Mar, 2025 - Comments: 0

Siemens' Bianca Ward argues that sustainability must be considered starting from the design phase to reduce the energy consumption of ICs as well as the production processes used to manufacture them. Synopsys' Adrien Tozzoli looks at how physical optics simulation can be improved by using beam synthesis propagation, a method that decomposes the optical field into a collection of beamlets to ... » read more

Research Bits: Mar. 25
By Jesse Allen - 25 Mar, 2025 - Comments: 0

2D materials in 3D transistors Researchers at the University of California Santa Barbara investigated 3D gate-all-around (GAA) transistors made using 2D semiconductors. They considered three different approaches to channel stacking: nano-sheet FETs, nano-fork FETs, and nano-plate FETs. The nano-plate FET architecture, which exploits lateral stacking of 2D layers, was found to maximize the g... » read more

Blog Review: Mar. 19
By Jesse Allen - 19 Mar, 2025 - Comments: 0

Cadence's Neelabh Singh explains the defined port operations of USB4 that are used to bring transmitters burst and receivers of a design under test into compliance mode and to execute tests like bit error tests, error rate tests, clock switch tests, TxFFE equalization tests, and electrical idle tests. Siemens EDA's Stephen V. Chavez examines the use of blind and buried vias in high-density i... » read more

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