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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Research Bits: May 9
By Jesse Allen - 09 May, 2022 - Comments: 0

Optical oscilloscope Researchers from the University of Central Florida developed an optical oscilloscope to measure the electric field of light. The high speed at which light oscillates has made reading its electric field challenging, with current instruments able to resolve an average signal associated with a pulse of light rather than individual peaks and valleys within the pulse. “... » read more

Week In Review: Design, Low Power
By Jesse Allen - 06 May, 2022 - Comments: 0

Rambus will acquire Hardent, a provider of design services and IP. Rambus said Hardent's silicon design, verification, compression, and Error Correction Code (ECC) expertise will provide key resources for the Rambus CXL Memory Interconnect Initiative. “Driven by the demands of advanced workloads like AI/ML and the move to disaggregated data center architectures, industry momentum for CXL-base... » read more

Startup Funding: April 2022
By Jesse Allen - 04 May, 2022 - Comments: 0

Silicon photonics holds the potential to vastly increase bandwidth in chips and systems while reducing power use — and investors are taking note. In April, one of the largest funding rounds went to a startup developing chip-to-chip optical I/O. But that wasn't all. Photonics funding showed up in AI with a photonic Tensor core, in room-temperature quantum computing, and, of course, in lidar an... » read more

Blog Review: May 4
By Jesse Allen - 04 May, 2022 - Comments: 0

In a podcast, Arm's Geof Wheelwright chats with Steve Furber of the University of Manchester and Christian Mayr of Technische Universität Dresden about spiking neural networks and the SpiNNaker project to build a platform for realistic real-time models of brain functions. Synopsys' Licinio Sousa checks out how the MIPI protocol enables the connectivity needed for sensor fusion and increasin... » read more

Research Bits: May 3
By Jesse Allen - 03 May, 2022 - Comments: 0

Fingerprinting quantum noise Scientists from the University of Chicago and Purdue University propose a different method of understanding the effect of noise in quantum computers. Instead of trying to measure it directly, they created a 'fingerprint' of how the noise impacts a program run on the computer. “We wondered if there was a way to work with the noise, instead of against it,” sai... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Apr, 2022 - Comments: 0

Arm unveiled the Arm Cortex-M85 processor and expanded Arm Virtual Hardware to more platforms, including 3rd party devices. The Cortex-M85 is the highest performance Cortex-M processor to date, with 30% scalar performance uplift compared to the Cortex-M7, technology to support endpoint ML and DSP workloads, and includes Pointer Authentication and Branch Target Identification (PACBTI), a new arc... » read more

Blog Review: April 27
By Jesse Allen - 27 Apr, 2022 - Comments: 0

Siemens' Joseph Dailey and Jake Wiltgen dispel misunderstandings around safety qualification of software tools and point to some of the safety issues that could lead to schedule delays and additional costs. Synopsys' Mark Kahan explains the testing that went into creating parts of the James Webb Space Telescope and key questions that were asked to ensure the mission could be successful even ... » read more

Research Bits: April 26
By Jesse Allen - 26 Apr, 2022 - Comments: 0

Photonic quantum computers Researchers from Stanford University propose a simpler design method for photonic quantum computers. The proposed design uses a laser to manipulate a single atom that, in turn, can modify the state of the photons via a phenomenon called “quantum teleportation.” The atom can be reset and reused for many quantum gates, eliminating the need to build multiple distinc... » read more

Week In Review: Design, Low Power
By Jesse Allen - 22 Apr, 2022 - Comments: 0

Tools & IP Synopsys unveiled a new neural processing unit (NPU) IP and toolchain. DesignWare ARC NPX6 NPU IP scales from 4K to 96K MACs with power efficiency of 30 TOPS/Watt. A single instance offers 250 TOPS at 1.3 GHz on 5nm processes in worst-case conditions, or up to 440 TOPS by using new sparsity features, which can increase the performance and decrease energy demands of executing a n... » read more

Blog Review: April 20
By Jesse Allen - 20 Apr, 2022 - Comments: 0

Cadence's Paul McLellan looks at the difference between 3D packaging and 3D integration and the different approaches to system-in-package designs. Siemens' Spencer Acain finds that despite having less precision and flexibility than digital chips, analog computing is having a resurgence in the space of cutting-edge AI thanks to the speed and energy efficiency in specialized tasks. Synopsys... » read more

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