Alternative Text

Jesse Allen

  (all posts)
Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Blog Review: May 22
By Jesse Allen - 22 May, 2024 - Comments: 0

Cadence's Sree Parvathy introduces Verilog-A, a high-level language that uses modules to describe the structure and behavior of analog systems and enables the top-down system to be defined before the actual transistor circuits are assembled. Siemens' Keith Felton suggests the process of package substrate design is improved by leveraging the collective expertise of multiple design domain spec... » read more

Research Bits: May 21
By Jesse Allen - 21 May, 2024 - Comments: 0

Lithium tantalate PICs Researchers at EPFL and Shanghai Institute of Microsystem and Information Technology developed scalable photonic integrated circuits (PICs) based on lithium tantalate (LiTaO3). Lithium tantalate can provide excellent electro-optic qualities and is used in telecom 5G RF filters. The team developed a wafer-bonding method for lithium tantalate, which is compatible with s... » read more

Blog Review: May 15
By Jesse Allen - 15 May, 2024 - Comments: 0

Cadence's Anika Sunda suggests that RISC-V has opened numerous doors for innovation and believes EDA tools can help bridge the knowledge gap and foster a growing community of RISC-V developers. Synopsys' Alessandra Costa chats with industry experts about challenges facing analog design, what's needed for multi-die designs, and the potential of AI. Siemens' Bill Ji explains why understandi... » read more

Research Bits: May 13
By Jesse Allen - 13 May, 2024 - Comments: 0

On-chip microcapacitors Scientists from Lawrence Berkeley National Laboratory and University of California Berkeley developed microcapacitors with ultrahigh energy and power density that could be used for on-chip energy storage. The microcapacitors were made with thin films of hafnium oxide (HfO2) and zirconium oxide (ZrO2) engineered to achieve a negative capacitance effect, which increase... » read more

Blog Review: May 8
By Jesse Allen - 08 May, 2024 - Comments: 0

Synopsys' Manuel Mota and Michael Posner look to UCIe as a complete stack for the die-to-die interconnect in multi-die chip designs, finding it can help maintain latency while reducing power and enhancing performance along with providing assurance of interoperability. Cadence's Durlov Khan highlights the Octal SPI interface for serial NAND flash, which enables 8-bit wide high bandwidth synch... » read more

Research Bits: May 7
By Jesse Allen - 07 May, 2024 - Comments: 0

High-temperature memory Researchers from the University of Pennsylvania and Air Force Research Laboratory demonstrated memory technology capable of enduring temperatures as high as 600° Celsius for more than 60 hours while retaining stability and reliability. The non-volatile memory device consists of a metal–insulator–metal structure, incorporating nickel and platinum electrodes with a 4... » read more

Blog Review: May 1
By Jesse Allen - 01 May, 2024 - Comments: 0

Cadence's Vatsal Patel stresses the importance of having testing and training capabilities for high-bandwidth memory to prevent the entire SoC from becoming useless and points to key HBM DRAM test instructions through IEEE 1500. In a podcast, Siemens' Stephen V. Chavez chats with Anaya Vardya of American Standard Circuits about the growing significance of high density interconnect and Ultra ... » read more

Research Bits: April 30
By Jesse Allen - 30 Apr, 2024 - Comments: 0

Sound waves in optical neural networks Researchers from the Max Planck Institute for the Science of Light and Massachusetts Institute of Technology found a way to build reconfigurable recurrent operators based on sound waves for photonic machine learning. They used light to create temporary acoustic waves in an optical fiber, which manipulate subsequent computational steps of an optical rec... » read more

Blog Review: April 24
By Jesse Allen - 24 Apr, 2024 - Comments: 0

Cadence's Vatsal Patel notes the factors that make high-bandwidth memory ideal for AI, such as improved bandwidth and area from vertical stacking and power reduction features like data bus inversion. Synopsys' Rob van Blommestein points to early power network analysis as a way to ensure that enough power is delivered to each transistor to mitigate potential power-related issues within the ch... » read more

Research Bits: April 23
By Jesse Allen - 23 Apr, 2024 - Comments: 0

Probabilistic computer prototype Researchers at Tohoku University and the University of California Santa Barbara created a prototype of a heterogeneous probabilistic computer that combines a CMOS circuit with a limited number of stochastic nanomagnets. It aims to improve the execution of probabilistic algorithms used to solve problems where uncertainty is inherent or where an exact solution... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy