Author's Latest Posts


Research Bits: Jan. 6


Ultrathin ferroelectric capacitors Researchers from the Institute of Science Tokyo and Canon ANELVA Corporation built an ultrathin ferroelectric memory capacitor stack using scandium-substituted aluminum nitride ((Al,Sc)N) thin films with platinum electrodes. The total thickness is just 30nm: a 20nm ferroelectric layer sandwiched between 5nm platinum top and bottom electrodes. “Previous r... » read more

Blog Review: Dec. 24


Cadence's Jakob Engblom shares highlights from the recent SDV Europe conference, including why software-defined vehicles will require much closer, faster collaboration between suppliers and customers, with virtualization for software development and testing taking on a key role, as well as API questions and tire sensors. Synopsys' Tom De Schutter and Marc Serughetti predict that new cars wil... » read more

Research Bits: Dec. 22


Photonic memory Researchers from the University of Southern California Information Sciences Institute and the University of Wisconsin-Madison fabricated a regenerative photonic latch memory on GlobalFoundries’ commercial silicon photonics platform, a step towards building a complete photonic SRAM system. The memory cell can store data as light and regenerate the signal to keep it stable a... » read more

Blog Review: Dec. 17


Cadence's Shyam Sharma checks out what's new in the latest Open NAND Flash Interface 5.2 standard, including a Separate Command Address protocol that allows Hosts to optimize the command and data scheduling to increase overall available bandwidth. Siemens' Kyle Fraunfelter and Melville Bryant contend that improving semiconductor manufacturing and fab sustainability starts with a digital twin... » read more

Research Bits: Dec. 16


Back-end integration Researchers from Massachusetts Institute of Technology (MIT) and the University of Waterloo propose a back-end integration platform that enables the fabrication of transistors and memory devices in a single compact stack on a chip. The approach uses amorphous indium oxide as the active channel layer of the back-end transistor. The properties of indium oxide allow a thin... » read more

Research Bits: Dec. 8


Iron-on circuit Researchers from Virginia Tech developed iron-on electronic circuits that can be applied to clothing. The patch uses electrically conductive liquid metal and a heat-activated adhesive to bond to fabric when heated with a hot iron. “E-textiles and wearable electronics can enable diverse applications from health care and environmental monitoring to robotics and human-machine... » read more

Blog Review: Dec. 3


Cadence's Reela Samuel notes that as multi-die integration becomes the new engine of semiconductor performance, the decision between 2.5D and 3D-IC architectures shapes a design's achievable bandwidth, energy efficiency, thermal limits, system size, and even program schedules. Synopsys' Thomas Andersen suggests that the deployment of physical AI will require the fusion of advanced electronic... » read more

Research Bits: Dec. 2


Ionothermoelectric cooling Researchers from the University of Osaka, University of Tokyo, and Japan's National Institute of Advanced Industrial Science and Technology proposed an ionothermoelectric cooling strategy for chips that enhances cooling by driving the flow of ions through nanoscale channels. “We fabricated a nanosized pore in a semiconductor membrane and surrounded the nanopore ... » read more

Research Bits: Nov. 26


Hydrogel NAND gate Researchers from McMaster University and the University of Pittsburgh created a functionally complete NAND gate in a soft material using only beams of visible light. The NAND logic operation was completed by shining three self-trapped light beams into a photoresponsive merocyanine-functionalized hydrogel that is capable of performing compute tasks in the material itself w... » read more

Blog Review: Nov. 26


Cadence's Rajneesh Chauhan explains CXL's low power state, L0p, which maintains partial lane activity for efficient power management without compromising performance, and how comprehensive verification can help ensure reliable implementation. Siemens' John Ferguson provides a brief history of design rule checking, major advancements over the years, and why introducing it in earlier design st... » read more

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