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Research Bits: December 5


Neuromorphic nanowires Researchers from UCLA and University of Sydney built an experimental computing system physically modeled after the biological brain. The device is composed of a tangled-up network of wires containing silver and selenium that were allowed to self-organize into a network of entangled nanowires on top of an array of 16 electrodes. The nanowire network physically reconfigure... » read more

Blog Review: November 29


Siemens' Matt Walsh checks out electro-thermal design and how a Boundary Condition Independent Reduced Order Model (BCI-ROM) can capture accurate characteristics from a 3D thermal analysis, ready for use in a 1D circuit simulation. Cadence's Vinod Khera considers how EDA could benefit from the AI revolution by providing a productivity boost through virtual assistants and improving code quali... » read more

Research Bits: Nov. 28


Switchable photodetector and neuromorphic vision sensor Researchers from the Institute of Metal Research at the Chinese Academy of Sciences built a device that can be switched between being a photodetector and neuromorphic vision sensor by adjusting the operating voltage. The trench-bridged GaN/Ga2O3/GaN heterojunction array device exhibits volatile and non-volatile photocurrents at low and hi... » read more

Research Bits: November 21


MoS2 in-memory processor Researchers from École Polytechnique Fédérale de Lausanne (EPFL) developed a large-scale in-memory processor using the 2D semiconductor material, molybdenum disulfide (MoS2), for the channel material in the more than 1,000 transistors that comprise the processor. The MoS2-based in-memory processor is dedicated to vector-matrix multiplication, key for digital signal ... » read more

Blog Review: November 15


Cadence's Neelabh Singh explores the process of lane initialization and link training in bringing up a high-speed link in USB4. Synopsys' Shela Aboud argues that TCAD should be an integral part of an EDA flow as it enhances design technology co-optimization with a way to experiment and determine what works and what doesn’t work at different process nodes using physics-based models. Siem... » read more

Research Bits: November 14


Solid-state thermal transistor for heat management Researchers from University of California Los Angeles created a stable and fully solid-state thermal transistor that uses an electric field to control a semiconductor device’s heat movement. It is compatible with integrated circuits in semiconductor manufacturing processes. The team’s design incorporates the field effect on charge dynamics... » read more

Startup Funding: October 2023


Investors are betting heavily on data center technology, with October funding going to companies developing data processing units (DPUs) to accelerate a variety of tasks, a near-memory distributed dataflow architecture for AI, and liquid cooling technology. Much of this is linked to the build-out of the edge, closer to the source of the data than the cloud but not as compute-intensive. Other ... » read more

Blog Review: Nov. 8


Siemens' Todd Westerhoff takes a look at the three stages of power integrity analysis for PCBs, challenges to board-level signal integrity, and best practices for getting the most accurate estimate of design performance. Synopsys' William Ruby provides a brief overview of the evolution of low-power design techniques and finds opportunities to reduce power and to make chip designs more energy... » read more

Research Bits: November 6


Fast superatomic semiconductor Researchers from Columbia University created a fast and efficient superatomic semiconductor material based on rhenium called Re6Se8Cl2. Rather than scattering when they come into contact with phonons, excitons in Re6Se8Cl2 bind with phonons to create new quasiparticles called acoustic exciton-polarons. Although polarons are found in many materials, those in Re6Se... » read more

Blog Review: November 1


Cadence’s Rich Chang finds that although UVM has being used for testbench creation for more than a decade, it is still challenging to debug problems that are inside of UVM testbench. Siemens’ Keith Felton suggests that early analysis in complex advanced packaging flows can enable designers to spot potential issues early to avoid built-in constructs that cause design failures and require ... » read more

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