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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Blog Review: May 19
By Jesse Allen - 19 May, 2021 - Comments: 0

Cadence's Paul McLellan checks out a project from Intel and DARPA to combine the eASIC structured ASIC technology with data interface chiplets and enhanced security protection, with manufacturing in the U.S. In a podcast, Siemens EDA's Ellie Burns and Michael Fingeroff discuss the gap between what the best AI applications can perform today versus the human brain and the challenges that hardw... » read more

Power/Performance Bits: May 18
By Jesse Allen - 18 May, 2021 - Comments: 0

Efficient high-voltage power conversion Researchers from École Polytechnique Fédérale de Lausanne (EPFL) and Enkris Semiconductor are working to design new power transistors with the aim of improving power converter efficiency. "We see examples of electric power losses every day, such as when the charger of your laptop heats up," said Elison Matioli, head of EPFL's POWERlab, noting that ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 May, 2021 - Comments: 0

Siemens Digital Industries Software acquired Fractal Technologies, a provider of tools for IP validation and comparison checks of standard cell libraries, IO, and hard IP that reports mismatches or modeling errors, as well as comparing new IP releases close to tape-out. Siemens plans to add Fractal’s technology to the Xcelerator portfolio, joining the Solido software product family, which inc... » read more

Blog Review: May 12
By Jesse Allen - 12 May, 2021 - Comments: 0

Cadence's Claire Ying points to major changes in PCIe 6.0 as PAM4 signaling replaces NRZ to help double bandwidth, Forward Error Correction helps maintain data integrity, and various improvements are made to power consumption. Synopsys' Samantha Beaumont argues that automotive sensors are a major potential attack point and addresses some of the key areas of sensor vulnerability and the chall... » read more

Power/Performance Bits: May 10
By Jesse Allen - 10 May, 2021 - Comments: 0

Probabilistic bit Researchers at Tohoku University are working on building probabilistic computers by developing a spintronics-based probabilistic bit (p-bit). The researchers utilized magnetic tunnel junctions (MTJs). Most commonly used in MRAM technology, where thermal fluctuation typically poses a threat to the stable storage of information, in this case it was a benefit. The p-bits f... » read more

Week In Review: Design, Low Power
By Jesse Allen - 07 May, 2021 - Comments: 0

Synopsys completed its acquisition of MorethanIP, a provider of Ethernet Digital Controller IP supporting data rates from 10G to 800G. The acquisition adds MAC (Medium Access Controller) and PCS (Physical Coding Sublayer) for 200G/400G and 800G Ethernet to Synopsys’ portfolio. The company also provides Time-Sensitive Networking, Fibre Channel, and Ethernet Switching IP for integration into AS... » read more

Blog Review: May 5
By Jesse Allen - 05 May, 2021 - Comments: 0

Arm's William Wang considers how to increase the performance and programmability of persistent applications through using battery to protect the on-chip volatile cache hierarchy. Cadence's Paul McLellan finds that ransomware is getting more sophisticated, and more difficult to eradicate and defend against, with potentially life-threatening consequences. Synopsys' Jonathan Knudsen digs int... » read more

Power/Performance Bits: May 4
By Jesse Allen - 04 May, 2021 - Comments: 0

Speculative execution vulnerable again Computer scientists from the University of Virginia and University of California San Diego warn of a processor architecture vulnerability that gets around the techniques used to secure processors in the wake of Spectre. In 2018, Spectre and the similar Meltdown vulnerability were announced. These types of attacks could allow malicious agents to exploit... » read more

Startup Funding: April 2021
By Jesse Allen - 03 May, 2021 - Comments: 0

April showers brought mega fundraising rounds to the semiconductor industry. In China, a mobile chipset maker looking to go public won significant funding along with partnerships with major smartphone companies. In the US, AI hardware startups are drawing interest with unique processor architectures and business models. Plus, a major test and design services company drew new investment. This mo... » read more

Week In Review: Design, Low Power
By Jesse Allen - 30 Apr, 2021 - Comments: 0

IP, FPGA, Tools Arm released new details on its new Neoverse N2 and Neoverse V1 platforms. A range of companies announced they will be using the platforms, including Marvell and SiPearl. Aimed at server and HPC workloads, Neoverse V1 uses wider and deeper pipelines compared to the N1 and supports a 2x256bit wide vector unit executing the Scalable Vector Extension (SVE) instructions with sup... » read more

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