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Week In Review: Design, Low Power


Rambus will acquire Northwest Logic, a maker of digital controller IP for memory, PCIe and MIPI. "Northwest Logic’s category-leading digital controllers fit perfectly with Rambus’ leadership portfolio of high-speed PHY solutions," said Northwest Logic president and CEO Brian Daellenbach. "This deal creates a one-stop-shop for SoC designers working on state-of-the-art applications across a b... » read more

Blog Review: July 31


Cadence's Meera Collier checks out a study that uses AI and natural language processing techniques to infer new discoveries in materials science from published academic literature and considers how it could be used in the future. Synopsys' Taylor Armerding considers whether the NIST Secure Software Development Framework, the latest standard aimed at improving software security, can succeed. ... » read more

Power/Performance Bits: July 30


100GHz transceiver Engineers at the University of California Irvine built a new wireless transceiver that works above 100 gigahertz. The 4.4-millimeter-square silicon chip, called an "end-to-end transmitter-receiver," uses a digital-analog architecture that modulates the digital bits in the analog and radio-frequency domains to process digital signals quickly and energy-efficiently. "We cal... » read more

Week In Review: Design, Low Power


CEVA acquired the Hillcrest Labs business from InterDigital. Hillcrest Labs supplies software and components for sensor processing in consumer and IoT devices. Hillcrest Labs' MotionEngine sensor processing software already runs on CEVA DSPs (as well as ARM and RISC-V cores) and enables high accuracy 6-axis and 9-axis sensor fusion, dynamic sensor calibration, and application specific features ... » read more

Blog Review: July 24


Synopsys' Taylor Armerding notes that while two Florida cities may have saved taxpayers millions by paying ransomware demands, doing so is likely setting up a ransomware tsunami that threatens other municipalities. In a video, Cadence's Jacek Duda digs into what's going on with the upcoming USB4 standard and what will change compared to USB 3.x. Mentor's Colin Walls shares a few embedded ... » read more

Power/Performance Bits: July 23


Image-recognizing glass Engineers at the University of Wisconsin-Madison, MIT, and Columbia University developed a way to create 'smart' glass capable of performing image recognition tasks without the need for electronics or power. "We're using optics to condense the normal setup of cameras, sensors and deep neural networks into a single piece of thin glass," said Zongfu Yu, electrical and ... » read more

Week In Review: Design, Low Power


Tools & IP Arm has a new access and licensing model for its IP. Flexible Access allows SoC design teams to initiate projects before they license IP by paying a yearly fee for immediate access to a broad portfolio of technology, then paying a license fee only when they commit to manufacturing, followed by royalties for each unit shipped. IP available through Arm Flexible Access includes the... » read more

Blog Review: July 17


Mentor's John McMillan takes a look at the three general classes that have been established by IPC-2221B to reflect progressive increases in sophistication, functional performance requirements, and testing/inspection frequency for PCBs. Synopsys' Dinesh Siwal and Thenmozhy Kaliyamurthy point out the new features and improvements in DisplayPort 2.0, including greater speeds, better power effi... » read more

Power/Performance Bits: July 15


Liquefied gas electrolyte Researchers at UC San Diego, U.S. Army Research Laboratory, and South 8 Technologies developed an electrolyte that could enable the replacement of the graphite anode in lithium-ion batteries with lithium-metal. Such a change would increase energy density 50% at the cell level, making for lighter batteries with more capacity. However, lithium-metal anodes are not compa... » read more

Week In Review: Design, Low Power


Synopsys unveiled the latest version of its IC Compiler II place-and-route system, adding a common physical optimization infrastructure, new arc-based unified concurrent clock-and-data (CCD) optimization, physically-aware logic re-synthesis, and dynamic voltage drop-driven power shaping. Additionally, next-generation distributed parallelization, intelligent scenario management, efficient infras... » read more

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