Mark LaPedus

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Mark LaPedus is Executive Editor for manufacturing at Semiconductor Engineering.

Author's Latest Posts

Week In Review: Manufacturing, Test
By Mark LaPedus - 07 Jan, 2022 - Comments: 0

Fab tools A fire broke out this week within ASML’s factory in Berlin, Germany. The fire was quickly extinguished and no one was injured during this incident. The factory manufactures components for ASML’s lithography systems, including wafer tables and clamps, reticle chucks and mirror blocks. The fire took place on Jan. 3. On Jan. 7, ASML provided an update. "The manufacturing of DUV c... » read more

Expanding Advanced Packaging Production In The U.S.
By Mark LaPedus - 05 Jan, 2022 - Comments: 0

The United States is taking the first steps toward bringing larger-scale IC packaging production capabilities back to the U.S. as supply chain concerns and trade tensions grow. The U.S. is among the leaders in developing packages, especially new and advanced forms of the technology that promise to shake up the semiconductor landscape. And while the U.S. has several packaging vendors, North A... » read more

Manufacturing Bits: Jan. 3
By Mark LaPedus - 03 Jan, 2022 - Comments: 1

Gallium oxide chips Looking to commercialize a promising ultra wide-bandgap technology in the market, Novel Crystal Technology (NCT) has developed a Schottky barrier diode based on a material called gallium oxide. NCT devised an ampere-class 1,200-V diode based on gallium oxide. A diode is a device that passes electricity in one direction and blocks it in the opposite direction. Still in R&... » read more

Manufacturing Bits: Dec. 28
By Mark LaPedus - 28 Dec, 2021 - Comments: 1

Measuring microdroplets The National Institute of Standards and Technology (NIST) has found a new way for microscopes to measure the volumes of microdroplets. Using this technique, NIST has measured the volume of individual droplets smaller than 100 trillionths of a liter with an uncertainty of less than 1%. That represents a tenfold improvement compared to previous measurements, according ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 23 Dec, 2021 - Comments: 0

Chipmakers TSMC has introduced another version of its 4nm process technology. The process, called N4X, is tailored for high-performance computing products. Recently, TSMC introduced another 4nm process, called N4P, which is an enhanced version of its 5nm technology. N4X is also an enhanced version of its 5nm technology. N4X, however, offers a performance boost of up to 15% over TSMC’s N5 pro... » read more

Manufacturing Bits: Dec. 21
By Mark LaPedus - 21 Dec, 2021 - Comments: 0

Tiny electronic fountain pens Karlsruhe Institute of Technology (KIT) and Taiyuan University of Technology have developed what resembles a tiny electronic fountain pen, a technology that can pattern and deposit small structures on surfaces. The system from KIT and Taiyuan University is actually a high-precision tabletop microplotter, which is used to print or deposit materials for printed e... » read more

Next Steps For Panel-Level Packaging
By Mark LaPedus - 20 Dec, 2021 - Comments: 1

Tanja Braun, group manager at Fraunhofer Institute for Reliability and Microintegration (IZM), sat down with Semiconductor Engineering to talk about III-V device packaging, chiplets, fan-out and panel-level processing. Fraunhofer IZM recently announced a new phase of its panel-level packaging consortium. What follows are excerpts of that discussion. SE: IC packaging isn’t new, but years a... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 17 Dec, 2021 - Comments: 0

Chipmakers Chip investments in Malaysia got a shot in the arm this week. First, Intel has announced plans to invest more than RM30 billion, or US$7 billion, within its Malaysian packaging and test facilities. The additional investment will help expand Intel Malaysia’s operations across Penang and Kulim. This new investment is expected to create over 4,000 Intel jobs as well as over 5,000 con... » read more

Covid Masks And Forecasts At Semicon
By Mark LaPedus - 16 Dec, 2021 - Comments: 0

Semicon West 2021 was certainty different, if not surreal, this year. The annual event was held in-person from Dec. 7-9, although there is a virtual component that runs until Jan. 7, 2022. In comparison, Semicon West was an all-virtual event in 2020, due to the Covid-19 pandemic. At this year’s in-person event in San Francisco, attendees, exhibitors and speakers were all required to wea... » read more

Business, Technology Challenges Increase For Photomasks
By Mark LaPedus - 16 Dec, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

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