Author's Latest Posts


FinFET And Multi-Patterning Aware Place-And-Route Implementation


The use of finFETs and multi-patterning has a huge impact on the entire physical implementation flow. This paper outlines the new challenges in placement, routing, optimization, and physical verification and describes how the Nitro-SoC place and route system handles them. To read more, click here. » read more

The Fundamental Power States For UPF Modeling And Power Aware Verification


The IEEE 1801-2015 specifies the new semantics of power states through the ‘add_power_state’ UPF command. This new construct primarily allows incremental refinement of power states for power domains and its associated supply sets. The refinement concepts are actually originated from the fundamental conceptual set of power states termed as indefinite, definite, and deferred power states. In ... » read more

How To Build Security Into Your IoT Wearable Device


In today's connected world, IoT wearable devices should be built from the ground up to include basic, fundamental security capabilities. This whitepaper explains the key security technologies critical for creating a secure IoT embedded device. Topics include code and boot-time authentication, establishing a chain of trust, process separation and space partitioning, using a safety-certified oper... » read more

Expose Transistor-Level Yield Limiters With Cell-Aware Diagnosis


Cell-aware diagnosis is a new and effective method to perform transistor-level diagnosis to identify defects inside standard cells. It leverages fault models derived from analog simulation and uses a fail data collection and diagnosis flow identical to that of traditional diagnosis. Cell-aware diagnosis in Tessent Diagnosis is the result of over 10 years of research in cell-aware test and was d... » read more

SRAM Physical Verification With Calibre Pattern Matching


Traditional SRAM verification flows can require significant resources to implement and support, and still miss critical errors that result in manufacturing defects. Using the Calibre Pattern Matching automated pattern-based solution provides accurate results, avoids costly mask re-spins, and is easily updated to add newly developed SRAM IP cells. To read more, click here. » read more

Low-Power Design Is A Corporate Mindset At ARM


The use of the PowerPro platform in the methodology outlined in this paper provides ARM with an RTL design flow which is power-centric. The ability to perform daily RTL power analysis at the block/unit level provides rapid turnaround on the power trend, while weekly analysis provides more complete benchmark reference metrics. To read more, click here. » read more

8 Ways To Improve Harness Manufacturing


A new generation of harness manufacturing engineering tools is now being used by companies worldwide, from small 10-employee companies to the biggest in the industry. With automation facilities engineers can rapidly create the drawings, calculations, work instructions and data required in harness manufacture, with reductions in quoting time and superior service and responsiveness to their custo... » read more

Multi-Board System Design


The last decade has seen extraordinary advances in printed circuit board design and fabrication. There has been substantial advances across design, from schematic entry to simulation to layout and routing to team collaboration and even to the way that manufacturing data is transferred to the fabricator. But there is one place where advancement has seemingly been stalled: the overarching system-... » read more

Mastering The Magic Of Multi-Patterning


Multi-patterning technology was introduced at the 20 nm node to overcome lithographic limitations in current IC manufacturing processes. While processes like double and triple patterning may sometimes seem like magic, successfully implementing multi-patterning compliance in the IC design and verification flow requires a thorough understanding of multi-patterning techniques and their impact on y... » read more

24 x 7 Productivity


Emulators are now managed as a corporate-wide shared resource in a datacenter, but standard job management software does not allow companies to take full advantage of emulator resources and capabilities. The Veloce Enterprise Server App (Veloce ES) delivers a fully-integrated solution for complete, transparent access to emulation resources for concurrent projects worldwide. It significantly enh... » read more

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