Author's Latest Posts


Low Power Coverage: The Missing Piece In Dynamic Simulation


Through real design examples and case studies, this paper demonstrates how to achieve comprehensive low power design verification closure with all possible sources of power states, their transition coverage, and cross-coverage of power domains of interdependent states. As well the paper proposes a mechanism to combine and represent LP and non-LP coverage in a unified and adaptable database with... » read more

Tessent Cell-Aware Test


Tessent Cell-Aware ATPG is a transistor-level ATPG-based test methodology that achieves significant quality and efficiency improvements by directly targeting specific shorts; opens and transistor defects internal to each standard cell; resulting in significant reductions in defect (DPM) levels. Traditional scan patterns are created using fault models that are based on the logical operation of t... » read more

‘Fuzzing’ A Virtual Prototype ECU To Improve Security


Staying ahead in the arms race against hackers means constantly looking for novel ways to find and correct security flaws, including (and perhaps especially) when it comes to relatively low-level hardware. In this brief white paper we describe one such way — an automated fuzzing test of a virtual ECU to find and correct vulnerabilities during the upstream development process. To read more,... » read more

Accelerating Test Pattern Bring-Up For Rapid First Silicon Debug


Reducing the time spent on silicon bring-up is critical in getting ICs into the hands of customers and staying competitive. Typically, the silicon bring-up process involves converting the test patterns to a tester-specific format and generating a test program that is executed by Automatic Test Equipment (ATE). This standard silicon bring-up flow is becoming too slow and expensive, especially fo... » read more

Utilizing Clock-Gating Efficiency To Reduce Power In RTL Designs


With the advent of the consumer era and the popularity of mobile applications, power optimization is the mantra of the day. Designers go through several iterations to optimize power in order to achieve their power budgets. The average Clock-Gating Efficiency for a design is a much better indicator of dynamic power consumption because it is a measure of both how many and how long registers are g... » read more

How Vehicle Electrification Impacts Electrical System Design


Autonomy and electrification are demanding significant changes to electrical and electronic architectures within vehicles. This is due in part to the introduction of high voltages, increased safety considerations and significant weight reductions needed to maximize vehicle range from electrification, and ‘fail operational’ designs, hugely increased data network loading and virtual validatio... » read more

Accelerate Computer Vision Design Using High-Level Synthesis


Computer vision solutions are all around us, in cars, consumer products, security, retail, and agriculture. But, designing these solutions is not easy, mainly because of constant algorithm upgrades and related requirements changes. This means that wherever the team is in the RTL creation and verification flow, they might have to start over, which can cause an unacceptable delay in the productio... » read more

Low Power Coverage


Through real design examples and case studies, this paper demonstrates how to achieve comprehensive low power design verification closure with all possible sources of power states, their transition coverage, and cross-coverage of power domains of interdependent states. As well the paper proposes a mechanism to combine and represent LP and non-LP coverage in a unified and adaptable database with... » read more

Accelerating Test Pattern Bring-Up For Rapid First Silicon Debug


Reducing the time spent on silicon bring-up is critical in getting ICs into the hands of customers and staying competitive. Typically, the silicon bring-up process involves converting the test patterns to a tester-specific format and generating a test program that is executed by Automatic Test Equipment (ATE). This standard silicon bring-up flow is becoming too slow and expensive, especially fo... » read more

Autonomy, Electrification And The Rise Of Model-Based EE Design


Powerful software that automatically transforms input models into deterministic outputs is transforming automotive electrical and electronics (EE) design. Martin O'Brien and Dan Scott set the stage for Mentor's advanced generative engineering approach. To read more, click here. » read more

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