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A Better Path From Simulink To RTL With Catapult HLS

Model-based, multi-domain simulation of a complete design.

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Design teams working on ASIC or FPGA projects often start with algorithm exploration using MATLAB in order to prove out the mathematical behavior of the functional blocks at a high level of abstraction. MATLAB as a high-level programming language doesn’t support hardware architecture modeling, so many teams use the Simulink environment for performing model-based, multi-domain simulation of the complete design. This process can be simplified by using Catapult High-Level Synthesis (HLS) along with a better workflow.

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