Essential Insights for Design PCIe 6.0 Interconnects


PCI Express (PCIe) is a serial communication protocol that has progressed through generations to enhance data rates and functionality. The latest version, PCIe 6.0, doubles the data rate to 64 GT/s, enabling up to 256 GB/s of bandwidth in an x16 configuration. The technology incorporates PAM4 signaling and forward error correction to maintain high speeds with improved signal integrity and relia... » read more

Digital Twins Find Their Footing In IC Manufacturing


Momentum is building for digital twins in semiconductor manufacturing, tying together the various processes and steps to improve efficiency and quality, and to enable more flexibility in the fab and assembly house. The movement toward digital twins opens up a slew of opportunities, from building and equipping new fabs faster to speeding yield ramps by reducing the number of silicon-based tes... » read more

Digital Twins Gaining Traction In Complex Designs


The integration of heterogeneous chiplets into an advanced package, coupled with the increasing digitalization of multiple industry segments, is pushing digital twins to the forefront of design. The challenge in these complex assemblies is figuring out the potential tradeoffs between different chiplets, different assembly approaches, and to be able to do it quickly enough to still hit market... » read more

Distribution of Currents In Via Arrays


It has become increasingly difficult in recent years to provide adequate PDNs on a PCB. The sheer number of different voltages, combined with increased current demands, makes distributing current around the board a substantial layout challenge. This paper demonstrates that by using appropriate and accurate simulations, combined with the improved intuition that such simulations bring, it is a ch... » read more

Steady and Unsteady Full-Engine Simulations


Discover the power of fully coupled steady and unsteady full-engine simulations. Say goodbye to traditional component-by-component methods. This innovative approach seamlessly integrates all engine components into a single, cohesive simulation framework, offering unparalleled accuracy and efficiency for aero-engine simulations. Key Takeaways: Steady and Time-Accurate: Achieve superio... » read more

Memory System Benchmarking, Simulation, And Application Profiling Via A Memory Stress Framework


A technical paper titled “A Mess of Memory System Benchmarking, Simulation and Application Profiling” was published by researchers at Barcelona Supercomputing Center, Unversitat Politecnica de Catalunya, and Micron Technology (Italy). Abstract: "The Memory stress (Mess) framework provides a unified view of the memory system benchmarking, simulation and application profiling. The Mess benc... » read more

Innovating Electric Mobility: Simulation Solutions For Electric Machines


Automakers desire solutions that can easily scale to new applications of next generation vehicles. Electrified propulsion technology is one main area where EV engineers are pushing the boundaries. Electric machine design and integration choices have system-level impacts that directly influence an automaker’s time to market and even overall market adoption. With Ansys multiphysics simulatio... » read more

Communication Is Key To Finding And Fixing Bugs In ICs


Experts at the Table: Finding and eliminating bugs at the source can be painstaking work, but it also can prevent even greater problems from developing later on. To examine the best ways to tackle this problem, Semiconductor Engineering sat down with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software product manager ... » read more

Can Models Created With AI Be Trusted?


EDA models that are created using AI need to pass more stringent quality and cost benefit analysis compared to many AI applications in the broader industry. Money is hanging on the line if AI gets it wrong, and all the associated costs must be factored into the equation. Models are some of the most expensive things a development team can create, and it is important to understand the value th... » read more

Engineers Or Their Tools: Which Is Responsible For Finding Bugs?


Experts at the table: Finding and eliminating bugs at the source can be painstaking work, but it can prevent bigger problems later in the design flow, when they are more difficult and expensive to fix.  Semiconductor Engineering sat down to discuss these issues with Ashish Darbari, CEO at Axiomise; Ziyad Hanna, corporate vice president R&D at Cadence; Jim Henson, ASIC verification software... » read more

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