Debug Tools Are Improving


Semiconductor Engineering sat down to discuss debugging complex SoCs with Randy Fish, vice president of strategic accounts and partnerships for UltraSoC; Larry Melling, product management director for Cadence; Mark Olen, senior product marketing manager for Mentor, a Siemens Business; and Dominik Strasser, vice president of engineering for OneSpin Solutions. Part one can be found here. Part two... » read more

Reusable UPF: Transitioning From RTL To Gate Level Verification


This paper highlights the differences between an RTL UPF and a Gate Level Simulation UPF, and presents a new methodology to write RTL UPF in such a way that minimal changes are required during gate-level power verification. To read more, click here. » read more

New Approaches For Hardware Security


Semiconductor Engineering sat down to discuss a wide range of hardware security issues and possible solutions with Norman Chang, chief technologist for the Semiconductor Business Unit at ANSYS; Helena Handschuh, fellow at Rambus, and Mike Borza, principal security technologist at Synopsys. What follows are excerpts of that conversation. (L-R) Norman Chang, Helena Handschuh, Mike Borza. Pho... » read more

Hybrid Emulation Takes Center Stage


From mobile to networking to AI applications, system complexity shows no sign of slowing. These designs, which may contain multiple billion gates, must be validated, verified and tested, and it’s no longer possible to just throw the whole thing in a hardware emulator. For some time, emulation, FPGA-based prototyping, and virtual environments such as simulators have given design and verific... » read more

How To Optimize Verification


The rate of improvement in verification tools and methodologies has been nothing short of staggering, but that has created new kinds of problems for verification teams. Over the past 20 years, verification has transformed from a single language (Verilog) and tool (simulator) to utilizing many languages (testbench languages, assertion languages, coverage languages, constraint languages), many... » read more

Paving The Way To Autonomous Driving


Over the past couple weeks, four major carmakers began pairing off to jointly develop autonomous vehicles. Numerous reports say Ford will sign a deal with Volkswagen, and BMW is working on Level 4 self-driving vehicles with Daimler, the parent of Mercedes Benz. While this speaks volumes about the enormous cost of developing artificial intelligence systems to drive vehicles, it also points th... » read more

5G OTA Test Not Ready For Production


5G is poised to dominate the wireless world, but over-the-air (OTA) testing of 5G beamforming antennas is still not ready for volume production. Beamforming is a critical element in the millimeter wave version of 5G, because of the limitations of ultra-high-frequency signals. Unlike 4G and its predecessors, millimeter wave technology will not penetrate objects, so signals need to be directed... » read more

Improving Simulation Throughput Using The Xcelium Parallel Logic Simulator


Simulators have been around for a long time. First, there were interpreters in the ‘80s and ‘90s, and despite being relatively slow, they were a big step up from fabricating the design and hoping it worked. However, as designs continued to increase in size, the interpreters could not keep up with simulation needs, and innovation was required for simulators to keep pace with new technology. ... » read more

Revolution By Evolution: Getting To The Next Technology Breakthrough In Analog Simulation


Recent technology developments, advanced-node adoptions, and Moore than Moore designs have forced analog and custom IC designers to adopt new design practices that benefit from these advancements. These changes have resulted in the need to simulate larger designs with more post-layout parasitics. In addition, many custom IC designs such as flash memory, MRAM, sensor arrays, etc., now require SP... » read more

Critical Success Factors When Implementing Simulation Led Design Exploration


Upfront simulation in the design stage of product development has long held great promise. It lets engineers find design flaws earlier and explore more alternatives. There is little doubt that such an effort offers tangible benefits to engineering organizations. But several obstacles often prevent companies from implementing a successful simulation initiative. The knowledge, skill, and time ... » read more

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