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Gaps In The AI Debug Process


When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

An FPGA-Based ECU for Remote Reconfiguration in Automotive Systems


Abstract: "Growing interest in intelligent vehicles is leading automotive systems to include numerous electronic control units (ECUs) inside. As a result, efficient implementation and management of automotive systems is gaining importance. Flexible updating and reconfiguration of ECUs is one appropriate strategy for these goals. Software updates to the ECUs are expected to improve performance ... » read more

What Is An xPU?


Almost every day there is an announcement about a new processor architecture, and it is given a three-letter acronym — TPU, IPU, NPU. But what really distinguishes them? Are there really that many unique processor architectures, or is something else happening? In 2018, John L. Hennessy and David A. Patterson delivered the Turing lecture entitled, "A New Golden Age for Computer Architecture... » read more

Solving Real World AI Productization Challenges With Adaptive Computing


The field of artificial intelligence (AI) moves swiftly, with the pace of innovation only accelerating. While the software industry has been successful in deploying AI in production, the hardware industry – including automotive, industrial, and smart retail – is still in its infancy in terms of AI productization. Major gaps still exist that hinder AI algorithm proof-of-concepts (PoC) from b... » read more

ML-based Routing Congestion And Delay Estimation In Vivado ML Edition


The FPGA physical design flow offers a compelling opportunity for Machine Learning for CAD (MLCAD) for the following reasons: • An ML solution can be applied wholesale to a device family. • There is a vast data farm that can be harvested from device models and design data from broad applications. • There is a single streamlined design flow that an be instrumented, annotated, and quer... » read more

Hierarchical Verification for EC-FPGA Flow


This document describes the methodology to apply EC-FPGA verification using hierarchical netlists. This approach is recommended in case the verification of the overall design has issues with convergence. The document contains a step-by-step description of different methods while providing reasoning for the soundness of each approach. It is assumed for this document that the reader is familiar w... » read more

Rising Fortunes For ICs In Health Care


Semiconductors are increasingly finding their way into a variety of medical devices, after years of slow growth and largely consumer electronics types of applications. Nearly every major chipmaker has a toehold in health care these days, and many are starting to look beyond wearable such as the Apple Watch to devices that can be relied on for accuracy and reliability. Unlike in the past, the... » read more

Adaptive Computing In Robotics


Traditional software development in robotics is about programming functionality in the CPU of a given robot with a pre-defined architecture and constraints. With adaptive computing, instead, building a robotic behavior is about programming an architecture. By leveraging adaptive computing, roboticists can adapt one or more of the properties of its computing systems (e.g., its determinism, power... » read more

Security Risks Grow With 5G


5G mobile phones can download a movie in seconds rather than minutes, but whether that can be done securely remains to be seen. What is clear from technology providers, though, is they are taking security very seriously with this new wireless technology. More data is in motion, and the value of that data is growing as users rely on mobile devices for everything from banking to automotive saf... » read more

Building Complex Chips That Last Longer


Semiconductor Engineering sat down to talk about design challenges in advanced packages and nodes with John Lee, vice president and general manager for semiconductors at Ansys; Shankar Krishnamoorthy, general manager of Synopsys' Design Group; Simon Burke, distinguished engineer at Xilinx; and Andrew Kahng, professor of CSE and ECE at UC San Diego. This discussion was held at the Ansys IDEAS co... » read more

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