Author's Latest Posts

Veloce System-Level Power Analysis And Verification
By Mentor, a Siemens Business - 11 Mar, 2015 - Comments: 0

Power analysis and verification need to move to the system level, improving upon and extending the capabilities and scope of RTL and gate-level techniques. The performance, capacity, and flexibility of emulation platforms make them the ideal technology for system-level power analysis and verification. Veloce delivers unprecedented power verification and analysis capabilities. This paper shares ... » read more

AUTOSAR And FlexRay
By Mentor, a Siemens Business - 05 Mar, 2015 - Comments: 0

This paper describes ways tools are quickly becoming the foundation for optimization processes that help engineers design profitable automotive products more efficiently than ever before. Standards are the enabling platform for the modern computer-based design tools that have transformed industries around the world. AUTOSAR is a leading effort to bring some standardization to the software platf... » read more

Debug This!
By Mentor, a Siemens Business - 25 Feb, 2015 - Comments: 0

Class-based debug is not the same as debugging RTL. You don’t have to be an object-oriented programmer in order to debug a class-based testbench, which is just a bunch of objects – some statically created, some dynamic – which interact with the DUT. The upshot? Class based debug doesn’t have to be hard! To read more, click here. » read more

Demonstrating The Benefits Of Source-Mask Optimization And Enabling Technologies Through Experiment And Simulations
By Mentor, a Siemens Business - 19 Feb, 2015 - Comments: 0

In recent years the potential of Source-Mask Optimization (SMO) as an enabling technology for 22nm-and-beyond lithography has been explored and documented in the literature. It has been shown that intensive optimization of the fundamental degrees of freedom in the optical system allows for the creation of non-intuitive solutions in both the mask and the source, which leads to improved lithograp... » read more

Optimizing Emulator Utilization
By Mentor, a Siemens Business - 11 Feb, 2015 - Comments: 0

Russ Klein describes how Codelink, a Mentor Graphics trace-based debug tool, gives software developers a traditional software debug view from a unique processor trace, enabling them to increase emulator utilization and enjoy a more productive debug experience. Codelink allows for software debug earlier in the design cycle, as it makes it possible to use the emulator without having debug circuit... » read more

Round-Trip Engineering Key To AUTOSAR-based Development
By Mentor, a Siemens Business - 05 Feb, 2015 - Comments: 0

This paper discusses how round-trip engineering can be used as an iterative development process and describes interoperability between tools from Mentor and MathWorks. Model-based design has become an important component in vehicle manufacturer and supplier development processes. Electronic control units are complex in terms of functionality, connectivity, and variants; therefore automotive ... » read more

A Complete Analog Design Flow For Verification Planning And Requirement Tracking
By Mentor, a Siemens Business - 28 Jan, 2015 - Comments: 0

Verifying designs to meet all specifications across all process corners has become an intractable problem from the perspective of debugging, managing, tracking, and meeting verification goals. Implementing a CDV methodology for analog designs can evolve analog design and verification to a standard process-based method that can be tracked and its progress measured. This paper aims to extend comm... » read more

EDT Test Points
By Mentor, a Siemens Business - 22 Jan, 2015 - Comments: 0

Embedded test compression was commercially introduced over a decade ago and has scaled to well beyond the 100X range envisioned when it was first introduced. However, growing gate counts enabled by new technology nodes as well as new fault models targeting defects within standard cells are driving the need for even greater compression levels. This paper describes an exciting new technology, cal... » read more

MEMS Capacitance Extraction With Calibre xACT-3D Software
By Mentor, a Siemens Business - 14 Jan, 2015 - Comments: 0

The growing use of MEM's in today's complex products requires new approaches to capacitance calculation to ensure companies can meet their time-to-market targets while producing products that meet performance and reliability expectations. Freescale Semiconductor and Mentor Graphics collaborated to demonstrate that Calibre xACT-3D software provides a robust method for extracting node-to-node cap... » read more

FPGA Verification with Assertions: Why Bother?
By Mentor, a Siemens Business - 17 Dec, 2014 - Comments: 0

This paper provides a practical, easy, step-by- step set of instructions on how to add assertions to your RTL design. By following the simple guidelines provided in this paper you will benefit by cutting simulation debugging time in half, as well as finding very complex bugs that are likely to escape traditional simulation without assertions. To read more, click here. » read more

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