Author's Latest Posts

Improving Robustness And Minimizing Over-Pessimism In The Face of Rising Design Variability

Part 1 of this blog explored the problems facing designers working on Systems-on-a-Chip (SoCs) targeting energy-efficient design, and how Synopsys’ PrimeShield design robustness solution can help optimize designs for lower power while achieving aggressive time-to-market goals. This last part will delve into how the PrimeShield design robustness solution can help SoC designers optimize thei... » read more

The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing Signoff

As process nodes shrink, complexity, cost and overall risk expand. Process variability that once was once acceptable now becomes a critical item as operating voltage decreases. Simply adding design margin makes the chip non-competitive. Physical effects that were once ignored now become critical as well. The impact of interconnect can no longer be modeled based on simple circuit topology. Layou... » read more