Author's Latest Posts


DDR5 Client Chipset


This episode of Ask the Experts discusses DDR5 for client systems with John Eble, VP of Product Marketing, Memory Interface Chips at Rambus. Topics discussed include: The need for advanced chipsets for DDR5 client DIMMs The role of the DDR5 Client Clock Driver (CKD) and its use cases The AI applications driving the need for greater memory performance in client systems Find more... » read more

Data Center Evolution: The Leap to 64 GT/s Signaling with PCI Express 6.1


The PCI Express (PCIe) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the rapid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.1 jumps signaling to 64 GT/s with some of the biggest changes yet in the standard. Find more inform... » read more

Supercharging AI Inference With GDDR7


A rapid rise in the size and sophistication of AI inference models requires increasingly powerful AI accelerators and GPUs deployed in edge servers and client PCs. GDDR7 memory offers an attractive combination of bandwidth, capacity, latency and power for these accelerators and processors. The Rambus GDDR7 Memory Controller IP offers industry leading GDDR7 performance of up to 40 Gbps and 160 G... » read more

HBM3E Memory: Break Through to Greater Bandwidth


Delivering unrivaled memory bandwidth in a compact, high-capacity footprint, has made HBM the memory of choice for AI training. HBM3 is the third major generation of the HBM standard, with HBM3E offering an extended data rate and the same feature set. The Rambus HBM3E/3 Controller provides industry-leading performance to 9.6 Gb/s, enabling a memory throughput of over 1.23 TB/s for training reco... » read more

HBM3E And GDDR6: Memory Solutions For AI


AI/ML changes everything, impacting every industry and touching the lives of everyone. With AI training sets growing at a pace of 10X per year, memory bandwidth is a critical area of focus as we move into the next era of computing and enable this continued growth. AI training and inference have unique feature requirements that can be served by tailored memory solutions. Learn how HBM3E and G... » read more

Post-Quantum Cryptography (PQC): New Algorithms For A New Era


Post-Quantum Cryptography (PQC), also known as Quantum Safe Cryptography (QSC), refers to cryptographic algorithms designed to withstand attacks by quantum computers. Quantum computers will eventually become powerful enough to break public key-based cryptography, also known as asymmetric cryptography. Public key-based cryptography is used to protect everything from your online communications... » read more

Package Propagation Delay Dependency Of Advanced Fly-By Routing For Next Generation DDR5


Package signal transit delay is an important parameter for high-speed designs like DDR5. Package delay along with PCB delay dictates the data rates of DDR5 interface running at 4.0 Gbps and beyond. From DDR3 (third generation DDR) onwards, daisy chain routing has been widely used as it can support high data rate operations by providing smaller trace stubs and capacitive loadings. Even so, beyon... » read more

HBM3 Memory: Break Through to Greater Bandwidth


Delivering unrivaled memory bandwidth in a compact, high-capacity footprint, has made HBM the memory of choice for AI/ML and other high-performance computing workloads. HBM3 as the latest generation of the standard raises data rates to 6.4 Gb/s and promises to scale even higher. The Rambus HBM3 controller provides industry-leading support of the extended roadmap for HBM3 with performance to 9.6... » read more

Post-Quantum Cryptography/PQC: New Algorithms For A New Era


Quantum computing is being pursued across industry, government and academia globally with tremendous energy, and powerful quantum computers will become a reality in the not-so-distant future. To ensure today’s data remains protected into the future, we need to implement now security solutions that safeguard against quantum attacks. Click here to read more. » read more

Securing Automotive Ethernet With MACsec Silicon IP


In today’s cars, the Ethernet standard is the go-to solution for connecting zonal gateways to the central compute units that handle ADAS functionality. However, in-vehicle networks are vulnerable to a number of security threats, including eavesdropping, denial-of-service attacks, man-in-the middle attacks, and unauthorized access. This white paper explores how MACsec provides an effective sol... » read more

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