Author's Latest Posts

Thin Quad Die Package (QDP) Development

In the world of solid-state memory fabs, bits per mm2 rule. In the memory packaging market, mm2 of silicon per a given package thickness is the defining feature. Both the memory architecture of the wafer and the package technology take advantage of 3D structures to achieve best in class bit density. In the case of the wafer fab, 3D NAND and other technologies are pushing the envelope to meet ev... » read more

Increasing The Conductive Density Of Packaging

Wide bandgap (WBG) semiconductor technologies have created new challenges and opportunities for power packages. Developments such as silicon carbide (SiC) and gallium nitride (GaN), have a higher figure of merit (FOM) compared to silicon MOSFETs and have extended the efficiency, output power and/or switching frequency range and operating temperature range for power electronics. With lower lo... » read more