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Microchip Sees Significant Productivity Gains In Mature-Node Custom IC Design With In-Design Signoff DRC


Microsemi pioneered the design of innovative chips that are used for multiple purposes across a variety of industries, using both mature and advanced process nodes. In mature node custom design implementation, layout designers still spend a significant amount of their valuable time fixing DRC errors—time that could be more beneficially spent ensuring their designs meet their PPA goals. By rep... » read more

Introducing mPower


Power integrity analysis evaluates circuits to determine if they will provide their designed/intended performance and reliability as implemented. Designers must be able to verify analog and digital power integrity from the RTL/gate-level through die-level integrations up to the package and board system-level. The mPower toolset is an innovative power integrity verification solution that brings ... » read more

Manage Scaling Challenges For Silicon Success


Semiconductor companies are faced with significant challenges related to technology scaling, design scaling, and system scaling. These challenges have a broad impact on design development, manufacturing, and functional operation. This paper discusses the challenges and the specific impact of a Silicon Lifecycle Solutions approach that includes DFT, operations, and Embedded Analytics in enabling... » read more

STMicroelectronics Methodology And Process For Heterogeneous Automotive Package Design


As a leading supplier of automotive semiconductors, STMicroelectronics must continue to move fast to develop and deliver leading-edge solutions. Employing package design as part of system innovation requires the STMicroelectronics Back-End Manufacturing Technology R&D organization to embrace the key driving forces of product development. In the automotive field, package designers need to... » read more

Automated ESD Protection Verification For 2.5D And 3D ICs


While automated flows for ESD protection verification are well-established for 2D ICs, 2.5D and 3D designs present new challenges in both ESD circuit design and verification. Advanced automated ESD verification methodology accurately and effectively evaluates ESD protection in 2.5/3D IC designs. Ensuring correct and consistent ESD protection in 2.5/3D ICs raises the reliability and product life... » read more

Shortest Resistance Path Deception In ESD Protection Circuit P2P Debug


Verifying and fixing ESD protection circuit violations is an essential step in tapeout sign-off flows for today’s IC chip designs. As one of the most commonly used ESD verification flows, the point to point (P2P) flow checks the resistances of ESD discharge paths in layout designs to ensure they are within design thresholds. However, when debugging P2P violations, information such as the shor... » read more

How To Maximize Your Competitiveness In The Semiconductor Industry Using Advanced DFT


Embarking on advanced SoCs without a smart design-for-test (DFT) strategy can be harmful to your bottom line. Being competitive in today’s semiconductor market means adopting integrated, scalable, and flexible solutions to cut DFT implementation time, test costs, and time-to-market. Tessent DFT technologies, developed in partnership with industry leaders, provide the most advanced DFT and yie... » read more

Consistent Test Reuse Across MIL, SIL, And HIL In A Model-Driven Development Workflow


This paper presents a standards-based, systematic, and automated generative MDD/XIL workflow that helps automotive developers develop their production ECU V&V suites early during software modeling and re-use them throughout the overall systems engineering project. The test cases developed during design can be re-used through to production ECU testing and ultimately for automated regression V&V ... » read more

Connecting Teams With A Collaboration Hub In The Cloud


Given the complexities inherent in both next-generation products and the underlying components used, effective collaboration is fundamental to successfully navigating the product creation journey. Teams that are better synchronized and aligned are far more likely to deliver a successful product to market on time and on budget. Explore how the Connect application extends the power of PADS Pro... » read more

2.5D And 3D-IC Latch-Up Prevention


2.5D/3D ICs have evolved into an innovative solution for many design and integration situations, but they present unique verification obstacles that challenge electronic design automation (EDA) tools originally designed for 2D ICs. Automated solutions are needed not only to reduce verification cycles but also to improve the quality and reliability of package designs. Automated verification o... » read more

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