Author's Latest Posts

The QA Exchange Deck In Solido Crosscheck Enables An IP Qualification Handshake
By Siemens EDA - 26 Jan, 2023 - Comments: 0

This paper describes how the QA exchange deck in Siemens EDA’s Solido Crosscheck software can be used to capture and exchange IP qualification requirements. It shows how the QA exchange deck can be used as part of the IP validation framework in Solido Crosscheck to provide an IP signoff handshake between IP suppliers and integrators. To read more, click here. » read more

Navigating The Intersection Of Safety And Security
By Siemens EDA - 23 Jan, 2023 - Comments: 0

Vehicle systems and the semiconductors used within them are some of the most complex electronics seen today. In the past, electronics going into vehicle systems implemented flat architectures with isolated functions controlling various components of the power train and vehicle dynamics. These electronic systems communicated primarily through legacy bus interconnect protocols, like controller... » read more

Efinix Implements Effective EM/IR Analysis For Leading-Edge FPGA Designs With The MPower Platform
By Siemens EDA - 12 Jan, 2023 - Comments: 0

Efinix turned to the Siemens mPower power integrity analysis platform to obtain the capabilities they needed for fast, accurate, full-chip EM/IR analysis of their Titanium FPGA designs. With no artificially enforced digital methodology, and a flat transistor analysis without elaborate views or modeling, the mPower platform analyzes custom layout and P&R IP in a single, seamless run. The mPo... » read more

High-Quality Test And Embedded Analytics For Secure Applications
By Siemens EDA - 05 Jan, 2023 - Comments: 0

Designs for secure applications such as smart cards and those used in the defense industry require security to ensure sensitive data is inaccessible to outside agents. This used to be a somewhat niche requirement and the implementation of custom solutions to meet these specific requirements was common. However, with the explosion within the semiconductor industry of automotive and cyber-phys... » read more

Comprehensive S-Parameter Verification Coverage With Analog FastSPICE
By Siemens EDA - 22 Dec, 2022 - Comments: 0

IC design is transforming at an accelerated pace along with fabrication technology. The need to incorporate more functionality has led to denser dies, multi-die chips, stacked 3D ICs and advanced packaging. Furthermore, design technology continues to progress towards supporting higher data rates to address the increasing demand for more and enhanced connectivity. We now must deal with much more... » read more

Speed Up Early Design Rule Exploration And Physical Verification
By Siemens EDA - 21 Dec, 2022 - Comments: 0

Ensuring that early-stage IC design physical verification actually enhances IC design and verification productivity means giving engineers the ability to focus on those errors that are both valid and critical in early-stage designs. The Calibre nmDRC Recon functionality provides selective DRC of early-stage designs that focuses on real, relevant errors, ignoring rule checks that generate meanin... » read more

12 Ways To Elevate Electronic Design Process Using PADS eBook
By Siemens EDA - 07 Dec, 2022 - Comments: 0

When using PADS Professional Premium, designers have access to standard PCB design functionality, such as schematic definition and physical layout, as well previously optional add-on features (now standard) and all of the latest cloud apps, including: Schematic definition: Access to everything you need: Circuit design and simulation, Component selection, library management, and signal integr... » read more

Packetized Scan Test
By Siemens EDA - 06 Dec, 2022 - Comments: 0

Bus-based packetized scan data decouples test delivery and core-level DFT requirements so core-level compression configuration can be defined completely independently of chip I/O limitations. Grouping cores for concurrent testing is selected programmatically, not hard-wired. This concept dramatically reduces the DFT planning and implementation effort. The Siemens solution for packetized deli... » read more

Peeling The Onion Of An Automotive IC Digital Twin
By Siemens EDA - 01 Dec, 2022 - Comments: 0

This paper defines the modern digital twin in the context of the automotive industry and as it applies to the ICs being deployed therein. Additionally, it surveys the implications arising from the need to use digital twins to connect the virtual and physical worlds for semiconductor suppliers delivering the next generation of automotive capabilities. Why should I care about digital twins? T... » read more

An Organic Package Designer’s Guide To Transitioning To FOWLP And 2.5D Design
By Siemens EDA - 23 Nov, 2022 - Comments: 0

The IC packaging design tool set has matured to the point where it can address not only classic plastic, organic and ceramic packaging substrates but can also address silicon substrates driven by interposer and chiplet designs. In most cases system and packaging teams do not have to abandon their existing tool set to support these designs. In fact, the packaging design tool set can offer additi... » read more

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