Author's Latest Posts

LLE-Aware Design Methodology To Avoid Timing And Power Pessimism
By Synopsys - 12 Mar, 2025 - Comments: 0

As chips move to ever-finer geometries, the active region (diffusion) shapes of neighboring cells can impact timing analysis and power calculations for the entire design. The LLE (Local Layout Effect) impact must be measured, but the impact is reflected very conservatively using conventional approaches. This paper describes a LLE-aware design methodology that mitigates the conservatism of co... » read more

Secure Interfaces for Critical Semiconductor Applications
By Synopsys - 06 Mar, 2025 - Comments: 0

Security is now a concern for nearly all semiconductors in nearly all applications. Once of high interest mostly for military and financial systems, both the increasingly connected world and the plethora of existing security threats have changed the landscape dramatically. Every aspect of electronic system design—hardware, firmware, and software—has its own sets of risks and requirements to... » read more

Pre-Silicon Verification Of Die-to-Die IP With Novel ESD Protection
By Synopsys - 26 Feb, 2025 - Comments: 0

All major foundries have adopted the programmable electrical rule checker (PERC) as the pre-silicon electrostatic discharge (ESD) signoff tool for IP and chip designs. This concept of rule checking works fine for most IP types, but for die-to-die IP, used in 3DIC designs, the PERC approach may not be appropriate. Die-to-die interface IP includes extremely large numbers of I/Os, trending towards... » read more

Why HPC Chip Designers Are Looking Into Linear Pluggable Optics
By Synopsys - 12 Feb, 2025 - Comments: 0

This paper delves into the technical complexities and emerging trends in integrating linear pluggable optics within AI chip design. The rapid growth of hyperscale data centers, driven by the demands of LLMs and transformative AI applications, requires innovative solutions optimized for power, latency, and bandwidth. Emerging industry standards are ensuring interoperability between independently... » read more

Securing FPGAs Beyond the Bitstream
By Synopsys - 06 Feb, 2025 - Comments: 0

FPGAs are a popular solution for low-volume applications and applications where frequent updates are essential to the value of the solution, as in many aerospace and defense and AI applications. Security is a critical part of FPGA solutions, and FPGA providers have invested much effort into securing the bitstream. However, there is a need for a cryptographic solution for FPGAs beyond the bitstr... » read more

Achieving Successful Timing, Power, And Physical Signoff For Multi-Die Designs
By Synopsys - 15 Jan, 2025 - Comments: 0

Multi-die designs using 2.5D and 3D technologies are increasingly important for a wide range of electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile. The multi-die architecture enables designers to mix dies from different foundries and technology nodes, including existing dies from previous projects. The resulting density and... » read more

SRAM PUF – The Secure Silicon Fingerprint
By Synopsys - 04 Dec, 2024 - Comments: 0

For many years, silicon Physical Unclonable Functions (PUFs) have been seen as a promising and innovative security technology making steady progress. Today, Static Random-Access Memory (SRAM)-based PUFs have been deployed in hundreds of millions of devices and offer a mature and viable security component that is achieving widespread adoption in commercial products. They are found in devices ran... » read more

Innovate Faster with A Multi-Die Solution
By Synopsys - 13 Nov, 2024 - Comments: 0

The semiconductor industry is experiencing a monumental shift in chip design, driven by the dramatic increase in AI compute performance requirements and limitations of Moore’s Law. The industry is adopting multi-die designs, which is the heterogeneous or homogeneous integration of dies (also called chiplets) in a single package. While multi-die design is the solution, it also introduces se... » read more

Democratizing Roots of Trust from Silicon to Software
By Synopsys - 07 Nov, 2024 - Comments: 0

With a vast amount of devices getting connected to the Internet of Things (IoT) and the growing number of low-cost attacks being developed to hack such IoT devices, it is clear that the need for embedded security solutions is rising dramatically. A security subsystem in the main system-on-chip (SoC) of a device can be deployed to offer secure cryptographic services to the applications running o... » read more

Early Architecture Performance and Power Analysis of Multi-Die Designs
By Synopsys - 30 Oct, 2024 - Comments: 0

Despite the clear advantages of multi-die designs, there are numerous new challenges that stand in the way of multi-die design realization. This white paper focuses on those challenges that can be addressed by early architecture exploration of multi-die designs, including: -System pathfinding -Memory utilization and coherency -Power/thermal management Find out how to overcome such chall... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy