Author's Latest Posts


Why HPC Chip Designers Are Looking Into Linear Pluggable Optics


This paper delves into the technical complexities and emerging trends in integrating linear pluggable optics within AI chip design. The rapid growth of hyperscale data centers, driven by the demands of LLMs and transformative AI applications, requires innovative solutions optimized for power, latency, and bandwidth. Emerging industry standards are ensuring interoperability between independently... » read more

Securing FPGAs Beyond the Bitstream


FPGAs are a popular solution for low-volume applications and applications where frequent updates are essential to the value of the solution, as in many aerospace and defense and AI applications. Security is a critical part of FPGA solutions, and FPGA providers have invested much effort into securing the bitstream. However, there is a need for a cryptographic solution for FPGAs beyond the bitstr... » read more

Achieving Successful Timing, Power, And Physical Signoff For Multi-Die Designs


Multi-die designs using 2.5D and 3D technologies are increasingly important for a wide range of electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile. The multi-die architecture enables designers to mix dies from different foundries and technology nodes, including existing dies from previous projects. The resulting density and... » read more

SRAM PUF – The Secure Silicon Fingerprint


For many years, silicon Physical Unclonable Functions (PUFs) have been seen as a promising and innovative security technology making steady progress. Today, Static Random-Access Memory (SRAM)-based PUFs have been deployed in hundreds of millions of devices and offer a mature and viable security component that is achieving widespread adoption in commercial products. They are found in devices ran... » read more

Innovate Faster with A Multi-Die Solution


The semiconductor industry is experiencing a monumental shift in chip design, driven by the dramatic increase in AI compute performance requirements and limitations of Moore’s Law. The industry is adopting multi-die designs, which is the heterogeneous or homogeneous integration of dies (also called chiplets) in a single package. While multi-die design is the solution, it also introduces se... » read more

Democratizing Roots of Trust from Silicon to Software


With a vast amount of devices getting connected to the Internet of Things (IoT) and the growing number of low-cost attacks being developed to hack such IoT devices, it is clear that the need for embedded security solutions is rising dramatically. A security subsystem in the main system-on-chip (SoC) of a device can be deployed to offer secure cryptographic services to the applications running o... » read more

Early Architecture Performance and Power Analysis of Multi-Die Designs


Despite the clear advantages of multi-die designs, there are numerous new challenges that stand in the way of multi-die design realization. This white paper focuses on those challenges that can be addressed by early architecture exploration of multi-die designs, including: -System pathfinding -Memory utilization and coherency -Power/thermal management Find out how to overcome such chall... » read more

Reduce Augmented Reality Device Time-to-Market by Bringing Manufacturing Impact to Optical Simulation


Disruptive AR systems will push the limits of optics: limits in design, limits in manufacturing, and limits in overall system integration. The trend of optical components being integrated into more complex miniaturized systems is impacting optical software. Optical design software has been around for decades to design, simulate, and analyze any optical component from lenses and mirrors to light... » read more

Maximizing Coverage Metrics with Formal Unreachability Analysis


Coverage lies at the very heart of functional verification. Whether designing a single intellectual property (IP) block or a huge system on chip (SoC), verification teams need to know how well the design has been tested. Functional coverage, code coverage, toggle coverage, assertion coverage, and other metrics are widely used. Improving tests to fill in coverage holes is a key part of the proce... » read more

12 Levers to Elevate Your Software Testing


Software dominates automotive functions. Superior product and software quality are the key to high customer satisfaction, meeting safety requirements, and conquering tough timelines. The challenge is how to achieve maximum software quality without hiring an army of testers. This checklist describes 12 levers you can pull to help you build the most effective test team, while making your tes... » read more

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