Author's Latest Posts


Schottky Barrier Transistors: Status, Challenges and Modeling Tools


A technical paper titled "Roadmap for Schottky barrier transistors" was published by researchers at University of Surrey, Namlab gGmbH, Forschungszentrum Jülich (FZJ), et al. Abstract "In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier (SB), as an asset for device functio... » read more

Designing Heterogeneous AI Acceleration SoCs


A new technical paper titled "Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience" was published by researchers at University of Bologna. Abstract "Since 2013, the PULP (Parallel Ultra-Low Power) Platform project has been one of the most active and successful initiatives in designing research IPs and releasing them as open-source. Its portfolio now ranges from processor co... » read more

Recent Advances and Challenges in Processing-in-DRAM (ETH Zurich)


A new technical paper titled "Memory-Centric Computing: Recent Advances in Processing-in-DRAM" was published by researchers at ETH Zurich. Abstract "Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performance and energy impact of data access and data movement, by 1) ... » read more

2D Ferroelectric Field-Effect Transistors (Penn State, U. of Minnesota)


A new technical paper titled "Multifunctional 2D FETs exploiting incipient ferroelectricity in freestanding SrTiO3 nanomembranes at sub-ambient temperatures" was published by researchers at Penn State University and University of Minnesota. Abstract "Incipient ferroelectricity bridges traditional dielectrics and true ferroelectrics, enabling advanced electronic and memory devices. Firstly... » read more

Advancements in SOT-MRAM Device Development (imec)


A technical paper titled "Recent progress in spin-orbit torque magnetic random-access memory" was recently published by imec. Abstract "Spin-orbit torque magnetic random-access memory (SOT-MRAM) offers promise for fast operation and high endurance but faces challenges such as low switching current, reliable field free switching, and back-end of line manufacturing processes. We review rece... » read more

In-Depth Study of Low-Power MCUs For Wearables (EPFL)


A new technical paper titled "Enabling Efficient Wearables: An Analysis of Low-Power Microcontrollers for Biomedical Applications" was published by researchers at EPFL. Abstract "Breakthroughs in ultra-low-power chip technology are transforming biomedical wearables, making it possible to monitor patients in real time with devices operating on mere {\mu}W. Although many studies have examined... » read more

Co-Packaged Optics To Train/Run GenAI Models in Data Centers (IBM)


A new technical paper titled "Next generation Co-Packaged Optics Technology to Train & Run Generative AI Models in Data Centers and Other Computing Applications" was published by researchers at IBM. Abstract "We report on the successful design and fabrication of optical modules using a 50 micron pitch polymer waveguide interface, integrated for low loss, high density optical data transf... » read more

Ammonia Plasma Surface Treatment for Improved Cu–Cu Bonding Reliability


A new technical paper titled "Ammonia Plasma Surface Treatment for Enhanced Cu–Cu Bonding Reliability for Advanced Packaging Interconnection" was published by researchers at Myongji University. Abstract "With the emergence of 3D stacked semiconductor products, such as high-bandwidth memory, bonding-interface reliability cannot be overemphasized. The condition of the surface interface befo... » read more

Wafer Bin Map Defect Classification Using Semi-Supervised Learning


A new technical paper titled "Semi-Supervised Learning with Wafer-Specific Augmentations for Wafer Defect Classification" was published by researchers at Korea University. Abstract "Semi-supervised learning (SSL) models, which leverage both labeled and unlabeled datasets, have been increasingly applied to classify wafer bin map patterns in semiconductor manufacturing. These models typical... » read more

CXL’s Potential to Elevate The Capabilities of HPC and AI Applications (Micron, Intel)


A new technical paper titled "Optimizing System Memory Bandwidth with Micron CXL Memory Expansion Modules on Intel Xeon 6 Processors" was published by researchers at Micron and Intel. Abstract "High-Performance Computing (HPC) and Artificial Intelligence (AI) workloads typically demand substantial memory bandwidth and, to a degree, memory capacity. CXL memory expansion modules, also known... » read more

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