Author's Latest Posts


Overview Of 103 Research Papers On Automatic SEM Image Analysis Algorithms For Semiconductor Defect Inspection (KU Leuven, Imec)


A new technical paper titled "Scanning electron microscopy-based automatic defect inspection for semiconductor manufacturing: a systematic review" was published by researchers at KU Leuven and imec. "We identified, categorized, and discussed automatic defect inspection algorithms that analyze scanning electron microscopy (SEM) images for semiconductor manufacturing (SM). This is a topic of c... » read more

Transformation Of 2D-ICs Into 3D-ICs Using Shuttle Chips From Multi-Project Wafers (Tohoku University)


A new technical paper titled "Die-Level Transformation of 2D Shuttle Chips into 3D-IC for Advanced Rapid Prototyping using Meta Bonding" was published by researchers at Tohoku University. Abstract "Three-dimensional integrated circuit (3D-IC) technology, often referred to as through-silicon via (TSV) formation technology, has been steadily maturing and is increasingly used in advanced semic... » read more

Open-Source And Royalty-Free Confidential Computing For Embedded RISC-V Systems (IBM, Max Planck)


A new technical paper titled "ACE: Confidential Computing for Embedded RISC-V Systems" was published by researchers at IBM Research, IBM T.J. Watson Research Center, Max Planck Institute for Software Systems (MPI-SWS). Abstract "Confidential computing plays an important role in isolating sensitive applications from the vast amount of untrusted code commonly found in the modern cloud. We a... » read more

Air-Gap Covert Channel Attack On Spread Spectrum Modulated Clocks (IETR, Lab-STICC)


A new technical paper titled "Clock-to-Clock Modulation Covert Channel" was published by researchers at University of Rennes-INSA Rennes-IETR-UMR  and University of South Brittany/Lab-STICC- UMR CNRS. Abstract "Various Electromagnetic (EM) attacks have been developed to modulate and utilize EM emanations for covert communication, including exploiting processors, memory modules, and periphe... » read more

Energy-Aware DL: The Interplay Between NN Efficiency And Hardware Constraints (Imperial College London, Cambridge)


A new technical paper titled "Energy-Aware Deep Learning on Resource-Constrained Hardware" was published by researchers at Imperial College London and University of Cambridge. Abstract "The use of deep learning (DL) on Internet of Things (IoT) and mobile devices offers numerous advantages over cloud-based processing. However, such devices face substantial energy constraints to prolong batte... » read more

Cache Side-Channel Attacks On LLMs (MITRE, WPI)


A new technical paper titled "Spill The Beans: Exploiting CPU Cache Side-Channels to Leak Tokens from Large Language Models" was published by researchers at MITRE and Worcester Polytechnic Institute. Abstract "Side-channel attacks on shared hardware resources increasingly threaten confidentiality, especially with the rise of Large Language Models (LLMs). In this work, we introduce Spill The... » read more

Demonstration Of EUV Scatterometry On A 2D Periodic Interconnect


A new technical paper titled "Coherent EUV scatterometry of 2D periodic structure profiles with mathematically optimal experimental design" was published by researchers at University of Colorado, NIST, Samsung and KMLAbs. Abstract "Extreme ultraviolet (EUV) scatterometry is an increasingly important metrology that can measure critical parameters of periodic nanostructured materials in a fas... » read more

Customizing A LLM Model For VHDL Design of High-Performance MPUs (IBM)


A new technical paper titled "Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors" was published by researchers at IBM. Abstract "The use of Large Language Models (LLMs) in hardware design has taken off in recent years, principally through its incorporation in tools that increase chip designer productivity. There has been considerable discussion about the ... » read more

Floorplanning Method For Reducing Thermally-Induced Structural Stress In Chiplet Packages (Penn State, Intel, ASU et al.)


A new technical paper titled "STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration" was published by researchers at Pennsylvania State University, Intel, Arizona State University and University of Notre Dame. Abstract "Chiplet-based architectures and advanced packaging has emerged as transformative approaches in semiconductor design. While conventional ph... » read more

Novel Thin Film Growth Technique Of A WBG Sulfide Semiconductor in BEOL Compatible Conditions (USC, LBNL, TSMC)


A new technical paper titled "Textured growth and electrical characterization of Zinc Sulfide on back-end-of-the-line (BEOL) compatible substrates" was published by researchers at USC, Lawrence Berkeley National Laboratory and TSMC. Abstract "Scaling of transistors has enabled continuous improvements in logic device performance, especially through materials engineering. However, surpassing ... » read more

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