Author's Latest Posts

Rowhammer Mitigation With Adaptive Refresh Management Optimization (KAIST, Sk hynix)
By Technical Paper Link - 12 Feb, 2025 - Comments: 0

A new technical paper titled "Securing DRAM at Scale: ARFM-Driven Row Hammer Defense with Unveiling the Threat of Short tRC Patterns" was published by researchers at KAIST and Sk hynix. Abstract (partial) "To address the issue of powerful row hammer (RH) attacks, our study involved an extensive analysis of the prevalent attack patterns in the field. We discovered a strong correlation betwee... » read more

High-Temperature Nonreciprocal Thermal Radiative Properties From Semiconductors (U. Houston, Caltech, UW-Madison)
By Technical Paper Link - 12 Feb, 2025 - Comments: 0

A new technical paper titled "High-Temperature Strong Nonreciprocal Thermal Radiation from Semiconductors" was published by University of Houston, California Institute of Technology and University of Wisconsin-Madison. Abstract "Nonreciprocal thermal emitters that break the conventional Kirchhoff's law allow independent control of emissivity and absorptivity and promise exciting new funct... » read more

Maximizing Energy Efficiency in Subthreshold RISC-V Cores (NTNU)
By Technical Paper Link - 12 Feb, 2025 - Comments: 0

A new technical paper titled "Optimizing Energy Efficiency in Subthreshold RISC-V Cores" was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract "Our goal in this paper is to understand how to maximize energy efficiency when designing standard-ISA processor cores for subthreshold operation. We hence develop a custom subthreshold library and use it to ... » read more

Wafer-Scale Computing for LLMs (U. of Edinburgh, Microsoft)
By Technical Paper Link - 09 Feb, 2025 - Comments: 0

A new technical paper titled "WaferLLM: A Wafer-Scale LLM Inference System" was published by researchers at University of Edinburgh and Microsoft Research. Abstract "Emerging AI accelerators increasingly adopt wafer-scale manufacturing technologies, integrating hundreds of thousands of AI cores in a mesh-based architecture with large distributed on-chip memory (tens of GB in total) and ultr... » read more

Potential of Wireless Interconnects For Improving Performance And Flexibility Of Multi-Chip AI Accelerators
By Technical Paper Link - 07 Feb, 2025 - Comments: 0

A new technical paper titled "Exploring the Potential of Wireless-enabled Multi-Chip AI Accelerators" was published by researchers at Universitat Politecnica de Catalunya. Abstract "The insatiable appetite of Artificial Intelligence (AI) workloads for computing power is pushing the industry to develop faster and more efficient accelerators. The rigidity of custom hardware, however, conflict... » read more

Power Delivery Challenges in 3D HI CIM Architectures for AI Accelerators (Georgia Tech)
By Technical Paper Link - 07 Feb, 2025 - Comments: 0

A new technical paper titled "Co-Optimization of Power Delivery Network Design for 3D Heterogeneous Integration of RRAM-based Compute In-Memory Accelerators" was published by researchers at Georgia Tech. Abstract: "3D heterogeneous integration (3D HI) offers promising solutions for incorporating substantial embedded memory into cutting-edge analog compute-in-memory (CIM) AI accelerators, ad... » read more

Transistor Sizing Approach for OTA Circuits Using a Transformer Architecture
By Technical Paper Link - 07 Feb, 2025 - Comments: 0

A  new technical paper titled "Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables" was published by University Minnesota and Cadence. Abstract: "Device sizing is crucial for meeting performance specifications in operational transconductance amplifiers (OTAs), and this work proposes an automated sizing framework based on a transform... » read more

Optimization of Oxygen Plasma Conditions for Cu-Cu Bonding
By Technical Paper Link - 04 Feb, 2025 - Comments: 0

A new technical paper titled "Understanding and Optimizing Oxygen Plasma Treatment for Enhanced Cu-Cu Bonding Application" was published by researchers at Seoul National University of Science and Technology. Abstract "This study investigates the optimization of O2 plasma treatment conditions to enhance Cu-Cu bonding. The O2 plasma treatment conditions were optimized using Design of Experime... » read more

Indium Tungsten Oxide (IWO) Thin-Film Transistors
By Technical Paper Link - 04 Feb, 2025 - Comments: 0

A new technical paper titled "Thermally Dependent Metastability of Indium-Tungsten-Oxide Thin-Film Transistors" was published by researchers at Rochester Institute of Technology and Corning Research and Development Corporation. Abstract "Indium tungsten oxide (IWO) has been investigated as an oxide semiconductor candidate for next-generation thin-film transistors (TFTs). Bottom-gate TFTs we... » read more

Optimization of the Inter-Chiplet Interconnect And The Chiplet Placement (ETH Zurich, U. of Bologna)
By Technical Paper Link - 04 Feb, 2025 - Comments: 0

A new technical paper titled "PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies" was published by researchers at ETH Zurich and University of Bologna. Abstract "2.5D integration technology is gaining traction as it copes with the exponentially growing design cost of modern integrated circuits. A crucial part of a 2.5D stacked chip is a low-latency and high-throughput inter-ch... » read more

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