Author's Latest Posts

Multi-Party Computation for Securing Chiplets
By Technical Paper Link - 12 Mar, 2025 - Comments: 0

A new technical paper titled "Garblet: Multi-party Computation for Protecting Chiplet-based Systems" was published by Worcester Polytechnic Institute. Abstract "The introduction of shared computation architectures assembled from heterogeneous chiplets introduces new security threats. Due to the shared logical and physical resources, an untrusted chiplet can act maliciously to surreptitiousl... » read more

A Novel Tier Partitioning Method in 3DIC Placement Optimizing PPA
By Technical Paper Link - 11 Mar, 2025 - Comments: 0

A new technical paper titled "PPA-Aware Tier Partitioning for 3D IC Placement with ILP Formulation" was published by researchers at Seoul National University and Ulsan National Institute of Science and Technology. Abstract "3D ICs are renowned for their potential to enable high-performance and low-power designs by utilizing denser and shorter inter-tier connections. In the physical design f... » read more

Thermal-Aware DSE Framework for 3DICs, With Advanced Cooling Models
By Technical Paper Link - 11 Mar, 2025 - Comments: 0

A new technical paper titled "Cool-3D: An End-to-End Thermal-Aware Framework for Early-Phase Design Space Exploration of Microfluidic-Cooled 3DICs" was published by researchers at University of Michigan, Shanghai Jiao Tong University and University of Virginia. Abstract "The rapid advancement of three-dimensional integrated circuits (3DICs) has heightened the need for early-phase design spa... » read more

Thermally Aware Chiplet Placement Algorithm Based on Automatic Differentiation (MIT, IBM)
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A new technical paper titled "DiffChip: Thermally Aware Chip Placement with Automatic Differentiation" was published by researchers at MIT and IBM. Abstract "Chiplets are modular integrated circuits that can be combined to form a larger system, offering flexibility and performance enhancements. However, their dense packing often leads to significant thermal management challenges, requiring ... » read more

4D mmWave Radar-Based Road Boundary Detection System
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A new technical paper titled "Road Boundary Detection Using 4D mmWave Radar for Autonomous Driving" was published by Stanford University. Abstract "Detecting road boundaries, the static physical edges of the available driving area, is important for safe navigation and effective path planning in autonomous driving and advanced driver-assistance systems (ADAS). Traditionally, road boundary de... » read more

The Optical Implementation of Backpropagation (Oxford, Lumai)
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A technical paper titled "Training neural networks with end-to-end optical backpropagation" was published by researchers at University of Oxford and Lumai Ltd. Abstract "Optics is an exciting route for the next generation of computing hardware for machine learning, promising several orders of magnitude enhancement in both computational speed and energy efficiency. However, reaching the full... » read more

Field-Coupled Nanocomputing: Scalable And Efficient Post-Layout Optimization (TU Munich)
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A new technical paper titled "Efficient and Scalable Post-Layout Optimization for Field-coupled Nanotechnologies" was published by researcher at the Technical University of Munich (TUM). Abstract "As conventional computing technologies approach their physical limits, the quest for increased computational power intensifies, heightening interest in post-CMOS technologies. Among these, Field... » read more

Solution To Read Disturbance For Current And Future DRAM Chips at Low Area, Performance And Energy Costs (ETH Zurich et al.)
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A new technical paper titled "Chronus: Understanding and Securing the Cutting-Edge Industry Solutions to DRAM Read Disturbance" was published by researchers at ETH Zurich, TOBB, and University of Sharjah. Abstract "We 1) present the first rigorous security, performance, energy, and cost analyses of the state-of-the-art on-DRAM-die read disturbance mitigation method, Per Row Activation Count... » read more

Understanding Fault Injection Attacks At The Pre-Silicon Level
By Technical Paper Link - 07 Mar, 2025 - Comments: 0

A new technical paper titled "CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon" was published by researchers at North Carolina State University. Abstract "Fault injection attacks represent a class of threats that can compromise embedded systems across multiple layers of abstraction, such as system software, instruction set architecture (ISA), microarchitecture, ... » read more

Effects Of Reduced Refresh Latency On RowHammer Vulnerability Of DDR4 DRAM Chips
By Technical Paper Link - 04 Mar, 2025 - Comments: 0

A new technical paper titled "Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions" was published by researchers at ETH Zurich, TOBB University of Economics and Technology, and University of Sharjah. Abstract "RowHammer is a major read disturbance mechanism in DRAM where repeatedly accessing (hammering) a row of... » read more

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