Author's Latest Posts


A Practical DRAM-Based Multi-Level PIM Architecture For Data Analytics


A technical paper titled "Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics" was published by researchers at Korea Advanced Institute of Science & Technology (KAIST) and SK hynix Inc. Abstract: "Processing-in-memory (PIM) architecture is an inherent match for data analytics application, but we observe major challenges to address when accelerating it usi... » read more

A Chiplet-Based Supercomputer For Generative LLMs That Optimizes Total Cost of Ownership


A technical paper titled "Chiplet Cloud: Building AI Supercomputers for Serving Large Generative Language Models" was published by researchers at University of Washington and University of Sydney. Abstract: "Large language models (LLMs) such as ChatGPT have demonstrated unprecedented capabilities in multiple AI tasks. However, hardware inefficiencies have become a significant factor limiting ... » read more

A Hardware Accelerator Designed For The Homomorphic SEAL-Embedded Library


A technical paper titled "VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library" was published by researchers at University of Pisa. Abstract: "Homomorphic Encryption (HE) allows performing specific algebraic computations on encrypted data without the need for decryption. For this reason, HE is emerging as a strong privacy-preserving solution... » read more

Gallium Oxide Flash Memory (KAUST & IIT)


A technical paper titled "Demonstration of β-Ga2O3 nonvolatile flash memory for oxide electronics" was published by researchers at King Abdullah University of Science and Technology (KAUST) and Indian Institute of Technology. Abstract: "This report demonstrates an ultrawide bandgap β-Ga2O3 flash memory for the first time. The flash memory device realized on heteroepitaxial β-Ga2O3 film... » read more

Topological Semimetal Synthesized Thin Film That Can Increase Power and Memory Storage While Using Less Energy


A technical paper titled "Robust negative longitudinal magnetoresistance and spin-orbit torque in sputtered Pt3Sn and Pt3SnxFe1-x topological semimetal" was published by researchers at University of Minnesota. Abstract: "Contrary to topological insulators, topological semimetals possess a nontrivial chiral anomaly that leads to negative magnetoresistance and are hosts to both conductive bulk ... » read more

A 3D MEMS Coaxial Socket Overcomes Challenges In Semiconductor Package Chip Testing


A technical paper titled "Fabrication and Characterization of Three-Dimensional Microelectromechanical System Coaxial Socket Device for Semiconductor Package Testing" was published by researchers at Yonsei University and Protec MEMS Technology. Abstract: "With the continuous reduction in size and increase in density of semiconductor devices, there is a growing demand for contact solutions tha... » read more

Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs


A technical paper titled "Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks" was published by researchers at Institute of Neuroinformatics, University of Zurich, and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their s... » read more

How To Fine-Tune Large-Area Molybdenum Disulfide Atomic Layer Deposition At 150°C


A technical paper titled "Toolbox of Advanced Atomic Layer Deposition Processes for Tailoring Large-Area MoS2 Thin Films at 150 °C" was published by researchers at Eindhoven University of Technology, University of Michigan, and University College Cork. Abstract: "Two-dimensional MoS2 is a promising material for applications, including electronics and electrocatalysis. However, scalable meth... » read more

System Level Power Integrity Verification For Multi-Core Microprocessors With FIVR


A technical paper titled "A Compressed Multivariate Macromodeling Framework for Fast Transient Verification of System-Level Power Delivery Networks" was published by researchers at Politecnico di Torino and Intel Corporation. Abstract: This paper discusses a reduced-order modeling and simulation approach for fast transient power integrity verification at full system level. The reference str... » read more

RowPress: Read-Disturb Phenomenon In DDR4 DRAM Chips


A technical paper titled "RowPress: Amplifying Read Disturbance in Modern DRAM Chips" was published by researchers at ETH Zürich. Abstract: "Memory isolation is critical for system reliability, security, and safety. Unfortunately, read disturbance can break memory isolation in modern DRAM chips. For example, RowHammer is a well-studied read-disturb phenomenon where repeatedly opening and clo... » read more

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