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A PIM Architecture That Supports Floating Point-Precision Computations Within The Memory Chip
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “FlutPIM: A Look-up Table-based Processing in Memory Architecture with Floating-point Computation Support for Deep Learning Applications” was published by researchers at Rochester Institute of Technology and George Mason University. Abstract: "Processing-in-Memory (PIM) has shown great potential for a wide range of data-driven applications, especially Deep Learnin... » read more

Multi-Rate Discrete-Time Modeling Approach Of A Power Hardware-in-the-Loop Setup (Karlsruhe Institute of Technology)
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “Multi-rate Discrete Domain Modeling of Power Hardware-in-the-Loop Setups” was published by researchers at the Institute for Technical Physics, Karlsruhe Institute of Technology, Karlsruhe, Germany. Abstract: "Power Hardware-in-the-Loop (PHIL) facilitates the testing of novel power engineering solutions in the lab, allowing a flexible testing environment while kee... » read more

Framework To Compile Quantum Programs Onto Chiplets (UCSB, Cisco)
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "Compilation for Quantum Computing on Chiplets" was published by researchers at UC Santa Barbara and Cisco Quantum Lab. Abstract: "Chiplet architecture is an emerging architecture for quantum computing that could significantly increase qubit resources with its great scalability and modularity. However, as the computing scale increases, communication between qubits w... » read more

3D Memory Structures: Common Hole And Tilt Metrology Techniques and Capabilities
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "Inline metrology of high aspect ratio hole tilt and center line shift using small-angle x-ray scattering" was published by researchers at Bruker Nano and Lam Research. Abstract: "High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep... » read more

Hardware Security: Eliminating/Reducing A Blind Spot of Side Channels (CISPA Helmholtz Center for Information Security)
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "(M)WAIT for It: Bridging the Gap between Microarchitectural and Architectural Side Channels" was published by researchers at CISPA Helmholtz Center for Information Security. Abstract: "In the last years, there has been a rapid increase in microarchitectural attacks, exploiting side effects of various parts of the CPU. Most of them have in common that they rely ... » read more

Comparing Analog and Digital SRAM In-Memory Computing Architectures (KU Leuven)
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A technical paper titled "Benchmarking and modeling of analog and digital SRAM in-memory computing architectures" was published by researchers at KU Leuven. Abstract: "In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surge... » read more

Issues and Opportunities in Using LLMs for Hardware Design
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A technical paper titled "Chip-Chat: Challenges and Opportunities in Conversational Hardware Design" was published by researchers at NYU and University of New South Wales. Abstract "Modern hardware design starts with specifications provided in natural language. These are then translated by hardware engineers into appropriate Hardware Description Languages (HDLs) such as Verilog before syn... » read more

Rowhammer Vulnerability Of A HBM2 DRAM Chip
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A new technical paper titled "An Experimental Analysis of RowHammer in HBM2 DRAM Chips" was published by researchers at ETH Zurich and American University of Beirut. Abstract: "RowHammer (RH) is a significant and worsening security, safety, and reliability issue of modern DRAM chips that can be exploited to break memory isolation. Therefore, it is important to understand real DRAM chips' ... » read more

Latest Discoveries in the Mechanics of 2D Materials
By Technical Paper Link - 31 May, 2023 - Comments: 0

A new technical paper titled "Recent advances in the mechanics of 2D materials" was published by researchers at McGill University, University of Science and Technology of China, and University of Illinois. "We review significant advances in the understanding of the elastic properties, in-plane failures, fatigue performance, interfacial shear/friction, and adhesion behavior of 2D materials. I... » read more

ALD-Oxide Semiconductors: Summary, Benefits And Challenges
By Technical Paper Link - 31 May, 2023 - Comments: 0

A technical paper titled "Atomic layer deposition for nanoscale oxide semiconductor thin film transistors: review and outlook" was published by researchers at Hanyang University. "In this review, to introduce ALD-oxide semiconductors, we provide: (a) a brief summary of the history and importance of ALD-based oxide semiconductors in industry, (b) a discussion of the benefits of ALD for oxide... » read more

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